FPGA Simulation, Verification Engineer
Quest Defense
full-time
Posted on:
Location Type: Remote
Location: Iowa • United States
Visit company websiteExplore more
Salary
💰 $150,000 - $180,000 per year
About the role
- Developing and enhancing a SystemVerilog/UVM-based verification environment for safety-critical FPGA designs.
- Building scalable testbenches, developing sequences, debugging RTL issues in simulation.
- Ensuring compliance with DO-254 DAL A standards.
Requirements
- Bachelor's Degree in electrical, computer or software engineering from an accredited college or university.
- 10+ years of relevant FPGA Verification experience.
- Ability to Construct FPGA Test Bench using UVM Components.
- Deep experience with System Verilog
- Experience with Sequence Development
- Experience with developing DO-254 related documents including but not limited to: Test Plans, Test Procedures, Test Cases, Maintaining a Trace Matrix
- Troubleshooting RTL Design Flaws using Simulation Environment.
- Ability to take a problem and come up with a solution.
- Familiarity with Unit level testbenches
- Familiarity with Chip Level testbenches
Benefits
- Competitive pay
- Comprehensive medical/dental/life and disability coverage
- 401(k) with employer match
- Professional development support
- Flexible, friendly workplace
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
SystemVerilogUVMFPGA VerificationTest Bench ConstructionSequence DevelopmentDO-254Test PlansTest ProceduresTest CasesTrace Matrix
Soft Skills
problem-solving
Certifications
Bachelor's Degree in electrical engineeringBachelor's Degree in computer engineeringBachelor's Degree in software engineering