PHIZENIX

Virtual Platform Hardware Modeling Engineer

PHIZENIX

full-time

Posted on:

Location Type: Office

Location: Sunnyvale • California • 🇺🇸 United States

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Salary

💰 $70 - $75 per hour

Job Level

JuniorMid-Level

Tech Stack

Jenkins

About the role

  • Design and develop SystemC TLM models to accurately represent the SoC architecture integrating emulated processors, DSPs, Network-on-Chip, DMA and memory controllers, etc…
  • Integrate first-party and vendor models into the Virtual Platform, develop automated workflows to ensure register-level accuracy and complete connectivity at the SoC level, minimizing manual intervention and enabling continuous integration.
  • Collaborate with silicon architects, digital designers and verification engineers to design and develop high-fidelity, fast C++ models for first-party IP.
  • Coordinate virtual platforms with hardware development programs, validating multiple SoCs and architectural changes with system software and firmware engineering, enabling end-to-end silicon validation test frameworks.
  • Enhance the virtual platforms to enable SoC and system architecture exploration by instrumenting models for power and performance metrics, allowing for data-driven design decisions and trade-off analysis to optimize system performance and power consumption.

Requirements

  • B.S. degree in Computer Science or Electrical Engineering or equivalent experience.
  • 2+ years experience in hardware model simulation, virtual platform, performance modeling of complex SoCs or high-fidelity hardware accelerators.
  • High proficiency in modern C++ in the domains of chip-design, electronic design automation or simulation.
  • General familiarity with SoC components: embedded processors such as ARM A/M series, Risc-V, DSP, DMA, Cache Hierarchy, DRAM, Network-on-chip, AMBA protocols. Extensive experience in at least one of these areas.
  • Experience with modern build frameworks and continuous integration systems, such as CMake, Bazel and CI frameworks such as Jenkins, GitLab CI/CD.
  • Experience with debugging and profiling tools, such as GDB or other debuggers

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard skills
SystemCTLM modelsC++hardware model simulationperformance modelingchip-designelectronic design automationdebuggingprofiling
Soft skills
collaborationcoordinationdata-driven designtrade-off analysis
Certifications
B.S. degree in Computer ScienceB.S. degree in Electrical Engineering