NVIDIA

EDA Workflow Optimization Engineer

NVIDIA

full-time

Posted on:

Origin:  • 🇺🇸 United States • California, Massachusetts, North Carolina

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Salary

💰 $272,000 - $471,500 per year

Job Level

SeniorLead

Tech Stack

PythonUnix

About the role

  • Partner closely with engineering teams worldwide to understand full chip design workflows from inception to production.
  • Guide teams to improve and re-invent flows; enable engineers with best tools.
  • Perform investigations to understand flaws and opportunities and construct metrics to measure performance of flows and services.
  • Work with EDA and software experts to build new infrastructure in an agile, production software environment.
  • Continuously innovate and enhance scalable, reliable, high performance systems and tools to enable next generation chips.
  • Participate in the full life-cycle of tool development, test, and deployment.
  • Work closely with other team members and chip engineers to optimize EDA workflows and the compute architecture.
  • Build metrics used by hundreds of engineers.
  • Contribute to overall quality and time to market for next generation chips.

Requirements

  • Strong experience investigating and debugging complex, multi-discipline problems in a UNIX engineering environment.
  • Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on.
  • Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow environments.
  • Hands-on experience with EDA tools.
  • Experienced in UNIX Systems programming and automation using Python and/or Shell.
  • Authoritative level usage of UNIX and UNIX utilities.
  • Excellent planning and communication skills.
  • Experience in applying data analysis principles and influencing data-driven decisions.
  • Flexibility/adaptability working in a dynamic environment with changing requirements.
  • PhD in Computer Science or equivalent experience.
  • 12+yrs of relevant experience.
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