Verification Engineer – Hardware
NVIDIA
full-time
Posted on:
Location Type: Office
Location: Bengaluru • India
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About the role
- Be responsible for creation of "state of the art" UVM based verification test benches and methodologies to verify complex IP's and Sub-systems.
- Work on System level verification using C/C++.
- Architect the testbenches and craft verification environment using UVM methodology.
- Define test plans, tests and verification infrastructure for modules, clusters and system.
- Build efficient and reusable bus functional models, monitors, checkers and scoreboards.
- Implement functional coverage and own verification closure.
- Work with architects, designers, FPGA and post-silicon teams to ensure that your unit is robust.
Requirements
- BTech/MTech with 3+ years of experience in verification closure of complex Unit, Sub-system or SOC level verification.
- Experience in CPU verification, Memory controller verification, Interconnect verification, High Speed IO verification (UFS/PCIE/XUSB), 10G/1G Ethernet MAC and Switch, Bus protocols (AXI/APB), System functions like Safety, Security, Virtualization and sensor processing
- Experience in the latest verification methodologies like UVM/VMM
- Exposure to industry standard verification tools for simulation and debug
- Exposure to Formal verification would be excellent
- Good debugging and analytical skills.
Benefits
- Comprehensive benefits package
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
UVMC/C++verification test benchesfunctional coveragebus functional modelsmonitorscheckersscoreboardsverification closuredebugging
Soft Skills
analytical skills
Certifications
BTechMTech