Principal Digital Design Engineer
NVIDIA
full-time
Posted on:
Location Type: Office
Location: Santa Clara • California • Texas • United States
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Salary
💰 $232,000 - $368,000 per year
Job Level
About the role
- Analyze the architectural requirements, perform the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks
- Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean block
- Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration engineers in order to meet the goals of the block in a timely manner
- Identify potential IP solutions for specific use cases and assist in selecting, customizing and integrating the right IP solutions
Requirements
- Bachelors or Master's Degree, or equivalent experience in Electrical Engineering or Computer Engineering
- 15+ years of relevant work experience
- Experience working with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, UCIE etc.
- Proven track record of delivering high bandwidth datapath blocks such as data movers, protocol adaptors, network-on-chip, arbiters and schedulers etc.
- Deep understanding of ASIC design flows and methodology
- Strong analytical and interpersonal skills, excellent teammate
Benefits
- Highly competitive salaries
- Comprehensive benefits package
- Eligible for equity
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
RTL designmicro-architecture specificationhigh-speed connectivity protocolsNVLinkPCI-ExpressEthernetUCIEASIC design flowsdatapath blocksprotocol adaptors
Soft Skills
analytical skillsinterpersonal skillsteamwork
Certifications
Bachelor's Degree in Electrical EngineeringMaster's Degree in Computer Engineering