The role entails working collaboratively and multi-functionally with a multi-disciplinary team of Circuit designers and mask designers
Perform physical layout for digital and mixed-signal functions like clock generators, op-amps, sensors, security circuits, power delivery circuits in state-of-the-art sub-micron CMOS technologies using Cadence tools
You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products
Job duties will include floor planning, custom layout and verifying against design rules and schematics
Fill, post-processing, DRC mitigation, and foundry interactions

Requirements

BS in Electrical Engineering (or equivalent experience)
At least 7+ years of hands-on layout design experience
Deep understanding of analog circuit layout concepts in submicron CMOS technologies
Validated experience with Cadence custom circuit design tools - particularly virtuoso
Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre
Leadership experience mentoring and assisting junior mask designers, implementing standard processes for the team, and keeping checklists for optimal layout design
Communicate with diverse team of mask designers across geographies and timezones
Ability to work optimally in a team, good interpersonal skills and positive energy
Proficiency in scripting languages like perl, python, skill etc. is a plus
Knowledge of layout automation is a definite plus

Benefits

You will also be eligible for equity and benefits

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools

layout designanalog circuit layoutsubmicron CMOS technologiesfloor planningcustom layoutDRC mitigationLVS verificationscripting languageslayout automation

Soft Skills

leadershipmentoringteam collaborationinterpersonal skillscommunication

Certifications

BS in Electrical Engineering