EPG is a fast-paced, dynamic, and startup-like group researching and developing next-generation technologies focused on computer vision, machine learning, data, and AI.
Join the Physical Design Team responsible for state of the art SoC design from definition to Tape-Out.
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.
Requirements
Student for BSc or MSc degree in Computer Engineering or Electrical Engineering.
Team player with excellent communication skills, customer orientation, and a “can-do” attitude.
Experience in scripting languages like Tcl/python/Perl/tcsh – Advantage.
Experience in relevant domains - Advantage.
Building or maintaining implementation tools and flow – Advantage.