Full-stack Engineer

• Work on verification of memory subsystems of Marvell's AI/ML, Network processing, Compute, Memory Expander and Accelerated Compute SOCs and IPs
• Develop the verification components for a functional verification environment, including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology
• Develop verification testplan and write tests using random techniques and coverage analysis, and work with designers to ensure it is complete
• Debug failures and work with designers to resolve issues
• Works independently and exercises judgement to make technical choices for obtaining results
• Provide technical guidance to junior engineers

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