Full-stack Engineer

• Work on verification of memory subsystems of Marvell's AI/ML, Network processing, Compute, Memory Expander and Accelerated Compute SOCs and IPs
• Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology
• Analyze designs and architectures to develop test strategies that will ensure functional correctness
• Develop verification testplan and write tests using random techniques and coverage analysis, and work with designers to ensure it is complete
• Debug failures and work with designers to resolve issues
• Contribute to the development and future direction of SoC verification methodologies and environments
• Provide leadership for a geographically dispersed team of verification professionals in pre-silicon validation of a highly complex SoC design

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