Senior Verification Engineer
Marvell Technology
full-time
Posted on:
Location Type: Office
Location: Petah Tikva • 🇮🇱 Israel
Visit company websiteJob Level
Senior
About the role
- Develop and maintain advanced verification components, environments, and testbenches
- Build System Verilog UVM verification environments for units in CnM
- Apply coverage-driven verification techniques, constrained random testing, and object-oriented programming
- Deliver the IPs to higher level verification like Cluster, FC and emulation
Requirements
- B.Sc. or M.Sc. in Electrical or Computer Engineering
- Excellent problem-solving and self-learning abilities
- Good interpersonal skills and teamwork
Benefits
- Competitive compensation
- Great benefits
- Environment of shared collaboration
- Transparency
- Inclusivity
- Tools and resources to succeed
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
System VerilogUVMcoverage-driven verificationconstrained random testingobject-oriented programming
Soft skills
problem-solvingself-learninginterpersonal skillsteamwork