Full-stack Engineer

• Work with a global team on both the physical design of complex chips as well as the methodology to enable an efficient and robust design process.
• Triage workflows, whether you’re running RTL code through synthesis and place and route (PnR) tools to create the physical view of the chip.
• Analyze performance by running timing analysis.
• Verify a robust power grid by performing EMIR analysis.
• Review completed runs for errors or create optimizations from successful runs.

Senior Staff Engineer, Physical Design

Senior Engineer, Physical Design