Design Automation Engineer – TFM, EDA

Intel Corporation

Design Automation Engineer supporting Intel Foundry PDKs, EDA tools, and silicon design workflows. Automating installations, resolving TapeOut issues, and scaling customer design environments.

Posted 9/2/2026full-timeFolsom • Arizona, California, Oregon • 🇺🇸 United StatesJuniorMid-Level💰 $117,620 - $227,270 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in installing and maintaining design environments, including automation scripts and EDA tools, while providing technical support for Intel PDK and design methodologies. Proficient in scripting languages and has a strong background in physical design and optimization.

Highest-signal resume keywords

Front-End And Back-End Design ToolsEDA Tools And MethodologiesVerilog/VHDLTcl, Perl, And Python ScriptingLinux Experience

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Physical DesignOptimizationDebuggingAutomation ScriptingInstallation Of Foundry PDKTool Flows And MethodologyProblem-SolvingDesign Automation

Soft Skills

CollaborationTrainingDocumentation

Tools & Technologies

Intel PDKEDA ToolsDesign EnvironmentsCompute Environments

Certifications & Qualifications

US CitizenshipUS Government Security Clearance TS/SCIActive US Government Security Clearance

Industry Keywords

TapeOutDesign Ramp-UpFlow DevelopmentCompute Capacity

Tech Stack

Tools & technologies

LinuxPerlPythonTypeScript

About the role

Key responsibilities & impact

Install, maintain, and provide technical support for design environments, including automation scripts, front-end and back-end design tools, flows, processes, and licenses
Support compute environments, including storage, compute, netbatch, and ION
Provide technical support for Intel PDK and collateral
Resolve designers' tool and methodology issues on the path to TapeOut
Support design ramp-up through training and documentation
Interact with EDA providers to ensure required tool features are available for projects with high quality
Partner with PDK/library experts, flow development teams, and product design teams
Collaborate with EC to provision adequate compute capacity and debug associated issues
Create automation such as scripts and checkers for installation of design environments, PDKs, EDA tools, and licenses
Integrate new tools and methods into existing design workflows for seamless adoption and scalability

Requirements

What you’ll need

US Citizenship required
Ability to obtain a US Government Security Clearance TS/SCI
BS in Electrical or Computer Engineering with 3+ years' experience OR MS in Electrical or Computer Engineering with 2+ years' experience in front-end and back-end design tools and flows
Experience in EDA tools and methodologies, including debugging and problem-solving
Experience in physical design, optimization, and tools flows and methodology (TFM)
Experience with Verilog/VHDL
Experience with Tcl, Perl, and Python scripting
Linux experience with bash and tcsh
Active US Government Security Clearance with a minimum of Secret level preferred
Hands-on experience of industry-standard front-end and back-end EDA tool installs preferred
Experience in installation of foundry PDK and flows (Cheetah, etc.) preferred
Experience with debugging and design automation preferred

Benefits

Comp & perks

Competitive pay
Stock bonuses
Health benefits
Retirement benefits
Vacation benefits
Hybrid work model allowing employees to split time between working on-site and off-site