SoC Verification Engineer

Intel Corporation

SoC Design Verification Engineer focusing on advanced semiconductor solutions at Intel. Responsible for designing and verifying SoC designs to meet functional specifications and improve product quality.

Posted 7/28/2026full-timeAustin • California, Oregon, Texas • 🇺🇸 United StatesMid-LevelSenior💰 $141,910 - $200,340 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Expertise in UVM-based test bench generation and SoC design verification, with a strong focus on debugging, test planning, and collaboration with cross-functional teams to enhance verification strategies.

Highest-signal resume keywords

UVM MethodologiesSoC Design VerificationDebugging SkillsTest PlanningAMBA Protocols

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

UVM Test Bench CreationVerification Plan DevelopmentEmulation and System SimulationRoot Cause AnalysisFunctional Verification Infrastructure

Soft Skills

CollaborationTechnical Documentation

Tools & Technologies

EDA ToolsVIP from EDA Vendors

Industry Keywords

Electrical EngineeringComputer EngineeringComputer SciencePresilicon EnvironmentsSecurity Coverage Activities

About the role

Key responsibilities & impact

Create and update UVM-based test bench generation and test case creation
Define and develop scalable and reusable block, subsystem, and SoC verification plans
Create test benches and verification environments that align with microarchitecture specifications
Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs
Debug and root cause issues in presilicon environments, implementing corrective measures to address failures
Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features
Document and maintain test plans, driving technical reviews with design and architecture teams
Integrate security coverage activities within test plans, including regression and debug tests
Maintain and improve existing functional verification infrastructure and methodologies
Absorb learnings from postsilicon development and incorporate feedback into improved verification strategies

Requirements

What you’ll need

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 4+ years of hands-on experience in SoC design verification OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in SoC design verification
demonstrated expertise in OVM/UVM methodologies, debugging, and test planning
AMBA protocols such as CHI, AXI, AHB, and APB with industry-standard VIP from various EDA vendors
Creation and updating of UVM-based test benches and test case creation

Benefits

Comp & perks

competitive pay
stock bonuses
health
retirement
vacation