Senior USB IP Design Verification Engineer

Intel Corporation

IP Design Verification Engineer ensuring functionality, quality, and efficiency of USB IP designs at Intel. Collaborate with teams and optimize verification processes.

Posted 7/15/2026full-timePenang • 🇲🇾 MalaysiaSeniorWebsite

Core Competencies

Role fit

Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in RTL design verification, including the development of functional verification plans and test benches, while utilizing System Verilog and UVM/OVM methodologies. Proficient in collaborating with cross-functional teams to validate complex microarchitectural features and drive improvements in test coverage and efficiency.

Highest-signal resume keywords

RTL Design VerificationSystem VerilogUVM/OVM MethodologiesTest Plan DevelopmentPre-Silicon Verification Tools

ATS Keywords

Tailor your resume

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills

Functional Verification PlansTestbench Infrastructure DesignPower-Aware Simulation TechniquesCoverage Points and Assertion ChecksHigh-Speed IO IPsVLSI Design FlowsSubsystem Interoperability ValidationSimulation Model ExecutionDebugging in Presilicon EnvironmentInnovative Problem-Solving Techniques

Soft Skills

CollaborationTechnical Review LeadershipDocumentation

Tools & Technologies

VCS/SynopsysPythonPerlShell Scripting

Certifications & Qualifications

Bachelor's Degree in Electrical EngineeringMaster's or PhD Preferred

Industry Keywords

Microarchitecture SpecificationsPower-Aware DesignTiming AnalysisFunctionality AnalysisDesign and Architecture Alignment

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Develop functional verification plans and test benches to ensure comprehensive coverage of microarchitecture specifications.
Execute verification strategies through system simulation models to analyze power, timing, and functionality while identifying and resolving bugs.
Implement corrective measures to address failing tests and debug issues in the presilicon environment.
Collaborate with architects, RTL developers, and physical design teams to validate complex architectural and microarchitectural features.
Maintain and improve functional verification infrastructure and methodologies to support ongoing innovation.
Document test plans and lead technical reviews with design and architecture teams to ensure alignment with project goals.
Drive improvements in test coverage, efficiency, and execution time through innovative problem-solving and validation techniques.

Requirements

What you’ll need

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or equivalent.
At least 6-8 years of industry experience in RTL design verification with expertise in System Verilog and UVM/OVM methodologies.
Proficiency in designing test plans, developing testbench infrastructure (including monitors, scoreboards, BFMs), and creating coverage points and assertion checks.
Familiarity with pre-silicon verification tools such as VCS/Synopsys and scripting languages like Python, Perl, or Shell for automation.
Understanding of high-speed IO IPs such as USB, PCI Express, or AMBA protocols.
Comprehensive knowledge of VLSI design flows, structural and physical design methodologies, and power-aware simulation techniques.
Advanced degree in a relevant field (Master's or PhD) preferred.
Experience with SoC-level validation environments and subsystem interoperability validation preferred.
Expertise in power-aware design, simulation, and validation flows for low-power architecture preferred.

Benefits

Comp & perks

Health insurance
401(k) matching
Flexible work hours
Paid time off
Remote work options