Senior Design Engineer – AI SoC Development

Intel Corporation

Senior Design Engineer developing RTL coding and simulation for SoC designs at Intel. Involved in architecture definition and logic design quality checks.

Posted 6/29/2026full-timeFolsom • California, Oregon, Texas • 🇺🇸 United StatesSenior💰 $190,610 - $269,100 per yearWebsite

Tech Stack

Tools & technologies

Python

About the role

Key responsibilities & impact

develop logic design, register transfer level (RTL) coding, and simulation for SoC designs while integrating IP blocks and subsystems into full chip SoC or discrete component designs
participate in defining architecture and microarchitecture features of the blocks being designed and perform quality checks across various logic design aspects ranging from RTL to timing/power convergence
apply various strategies, tools, and methods to write RTL and optimize logic to meet power, performance, area, and timing goals while ensuring design integrity for physical implementation
working closely with verification teams, review verification plans and implementation to ensure design features are verified correctly, resolving and implementing corrective measures for failing RTL tests
follow secure development practices to address security threat models and security objectives within the design, work with IP providers to integrate and validate IPs at the SoC level, and drive quality assurance compliance for smooth IP/SoC handoff

Requirements

What you’ll need

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
7+ years of experience in RTL design and implementation for ASIC/SoC development
Proven ability to solve complex design challenges such as clock domain crossings, power optimization, and timing closure
Hands-on experience with SoC system integration and multicore CPU subsystem design
Strong knowledge of standard bus protocols (AXI, AHB, etc.) and embedded processor architectures
Expertise in high-speed and low-power design techniques
Proficiency in scripting (Python, TCL, etc.) for automation and design flow optimization
Familiarity with industry standard EDA tools, including simulators (VCS, Questa, Xcelium), lint tools (Spyglass), and FPGA prototyping tools (Xilinx Vivado, Altera Quartus II)
Ability to thrive in a dynamic environment with evolving requirements

Benefits

Comp & perks

competitive pay
stock bonuses
health
retirement
vacation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

RTL CodingLogic DesignTiming ClosureSoC System IntegrationStandard Bus Protocols (AXI, AHB)High-Speed Design TechniquesLow-Power Design TechniquesVerification Plans ReviewQuality Assurance ComplianceClock Domain Crossing Solutions

Soft Skills

Problem SolvingAdaptability