CPU RTL Design Engineer

Intel Corporation

CPU Logic Design Engineer optimizing RTL coding and simulation for Intel's processors. Collaborating with customers and ensuring design integrity for innovative solutions in technology.

Posted 6/19/2026full-timeAustin • Arizona, Texas • 🇺🇸 United StatesSeniorLead💰 $141,910 - $269,100 per yearWebsite

Tech Stack

Tools & technologies

AssemblyPerlPython

About the role

Key responsibilities & impact

Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU.
Participate in defining the architecture and microarchitecture features of the CPU design.
Write RTL and optimize logic for power, performance, area, and timing goals.
Ensure design integrity for physical implementation through effective strategies, tools, and methods.
Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
Document microarchitectural specifications (MAS) for the CPU features.
Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.

Requirements

What you’ll need

Bachelor's degree in electrical engineering, computer engineering, or computer science with 7+ years of relevant experience; OR Master's degree with 5+ years of experience; OR PhD with 2+ years of experience.
7+ years experience in RTL design using Verilog, V2K, or System Verilog, with strong knowledge of hardware modeling and logic debug environments.
5+ years experience with modern energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization.
5+ years experience in Cross-clock domain crossings and power aware design.
3+ years experience in scripting languages such as TCL, Perl, or Python.
Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling (preferred).
Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language (preferred).
Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays (preferred).
Familiarity with circuit planning and timing convergence processes (preferred).
Ability to leverage broad understanding of CPU architecture to deliver impactful solutions (preferred).

Benefits

Comp & perks

competitive pay
stock bonuses
benefit programs which include health, retirement, and vacation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

RTL designVerilogV2KSystem Veriloghardware modelinglogic debugenergy-efficient designlow-power designscripting languagesx86 assembly language

Soft Skills

collaborationproblem-solvingdocumentation