Senior Full Chip Physical Design Integration Lead

Intel Corporation

SOC Physical Design Engineer at Intel driving physical design implementation of custom IP and SoC technologies. Involved in various aspects from RTL to GDS, enabling high-performance products.

Posted 5/24/2026full-timeBeaver Brook • Massachusetts, Oregon • 🇺🇸 United StatesSenior💰 $164,470 - $311,890 per yearWebsite

About the role

Key responsibilities & impact

work on SOC floorplan, pin and macro placement optimizing area and efficiency
perform physical design implementation for custom IP and SoC designs across the entire design flow, including synthesis, place and route, clock tree synthesis, floor planning, and static timing analysis
conduct verification and signoff activities such as formal equivalence verification, reliability verification, power integrity analysis, and layout verification using industry-standard EDA tools
drive design optimization across multiple power domains, static and dynamic power integrity analysis, and structural design checking
participate in the development and enhancement of physical design methodologies and flow automation
collaborate with cross-functional teams to ensure designs meet product-level parameters, quality benchmarks, and are ready for manufacturing

Requirements

What you’ll need

Bachelor’s degree with 8+ years or master’s degree with 6+ years or PhD with 4+ years in Electrical/Electronic Engineering, Computer Engineering, Computer Science or a related technical discipline
4+ years of experience with proficiency in physical design flows, including synthesis, place and route, clock tree synthesis, and static timing analysis
expertise in design optimization for physical design, multi-power plane design (MPP/UPF), and RTL to GDS workflows
hands-on experience with scripting to automate design flows
knowledge of EDA tools and methodologies for verification, reliability, timing closure, and power integrity analysis
strong analytical skills with the ability to identify and resolve complex design challenges efficiently
effective communication skills and the ability to work collaboratively within a team-oriented environment
experience developing and improving physical design methodologies and automation tools

Benefits

Comp & perks

competitive pay
stock bonuses
health
retirement
vacation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

physical design implementationsynthesisplace and routeclock tree synthesisstatic timing analysisdesign optimizationmulti-power plane designRTL to GDS workflowsscriptingEDA tools

Soft Skills

analytical skillseffective communicationcollaborationproblem-solving

Certifications

Bachelor’s degreeMaster’s degreePhD