Principal Analog Circuit Design Engineer – SerDes

Intel Corporation

Principal Analog Design Engineer at Intel leading design and validation of 112G/224G SerDes circuits. Collaborating with cross-functional teams and mentoring junior engineers in advanced analog design.

Posted 5/1/2026full-timeSanta Clara • Arizona, California, Oregon • 🇺🇸 United StatesLead💰 $220,920 - $311,890 per yearWebsite

About the role

Key responsibilities & impact

lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications.
be a key technical driver in the definition, execution, and validation of complex analog and mixed-signal designs.
provide technical direction and mentorship to layout and less experienced analog design engineers.
engage closely with cross-functional teams, including systems, digital design, and test engineering, to ensure robust design implementation and validation.
demonstrate a proven track record of delivering high-quality results in advanced FinFET CMOS technology within high-speed SerDes design environments.
actively participate in technical discussions across multiple disciplines, including analog/mixed-signal design, post-silicon validation, and system-level collaboration.

Requirements

What you’ll need

Master's degree in Electrical Engineering, Electronics Engineering, or related field.
8+ years of experience in analog/mixed-signal circuit design for high-speed SerDes applications.
Proven expertise in one or more of the following areas: PLL, CDR, CTLE, DFE, ADC, or Transmitter (TX) design.
Strong understanding of high-speed communication standards such as PCIe (Gen5/Gen6) and Ethernet (100G/400G/800G).
Solid foundational knowledge of analog design principles-noise, jitter, matching, stability, and linearity.
Hands-on experience with advanced FinFET CMOS process technologies (7nm or below).
Proficiency in analog design and simulation tools such as Cadence Virtuoso/ADE, HSPICE, or equivalent.
Experience in silicon bring-up, post-silicon validation, and lab debug of analog circuits.

Benefits

Comp & perks

competitive pay
stock bonuses
benefit programs which include health, retirement, and vacation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

analog circuit designmixed-signal designhigh-speed SerDes applicationsPLLCDRCTLEDFEADCTransmitter designFinFET CMOS technology

Soft Skills

technical directionmentorshipcross-functional collaborationcommunicationproblem-solvingleadershipteamworktechnical discussion participationvalidationexecution

Certifications

Master's degree in Electrical EngineeringMaster's degree in Electronics Engineering