SOC Design Verification Engineer
Intel Corporation
full-time
Posted on:
Location Type: Hybrid
Location: Santa Clara • California • Colorado • United States
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Salary
💰 $164,470 - $311,890 per year
About the role
- Conduct functional logic verification of SoC designs to ensure they meet design requirements and specifications
- Develop scalable and reusable verification plans, test benches, and environments for blocks, subsystems, and the entire SoC to meet coverage requirements
- Execute verification plans using emulation and system simulation models to validate design functionality, analyze performance metrics, and uncover bugs
- Debug issues within the presilicon environment, identify root causes, and implement corrective measures effectively
- Collaborate with architects, RTL developers, and design teams to enhance verification of complex SoC features
Requirements
- Bachelor's degree in Electrical Engineering, Computer Science, or a related field with 8+ years of industry experience or Master's degree in Electrical Engineering, Computer Science, or a related field with 6 or more years of industry experience or PhD in Electrical Engineering, Computer Science, or a related field with 4 or more years of industry experience
- Proficiency in OVM/UVM methodologies and System Verilog-based constrained random verification
- Experience in developing and executing verification test plans, including debugging and coverage closure
- Proficiency in scripting languages to facilitate automation
Benefits
- competitive pay
- stock bonuses
- health insurance
- retirement plans
- vacation
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
SoC design verificationverification planstest benchesemulationsystem simulationdebuggingOVMUVMSystem Verilogscripting languages
Soft Skills
collaborationproblem-solvinganalytical skillscommunication
Certifications
Bachelor's degreeMaster's degreePhD