Verification Engineer
Intel Corporation
full-time
Posted on:
Location Type: Hybrid
Location: Petah-Tikva • Israel
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About the role
- Develop IP verification plans, test benches, and verification environments
- Execute verification plans and define system simulation models
- Replicate, root cause, and debug issues in the pre-silicon environment
- Collaborate with architects, RTL developers, physical design teams, and other DV teams
- Document test plans and drive technical reviews of plans and proofs
- Maintain and improve existing functional verification infrastructure
Requirements
- At least 4 years of experience in design verification
- Proficiency in System Verilog UVM
- Verification block level and Super Cluster experience (preferred)
- Scripting language abilities
- Experience with data-center connectivity solutions
- Knowledge of networking protocols and Smart NIC architectures
Benefits
- Hybrid work model that allows employees to split their time between working on-site and off-site.
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
System VerilogUVMdesign verificationscripting languagesverification planstest benchessystem simulation modelsdebuggingfunctional verificationdata-center connectivity
Soft Skills
collaborationdocumentationtechnical reviews