FPGA Verification Engineer, Air Dominance and Strike

HIKINEX

. Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs .

Posted 4/21/2026full-timeRemote • California • 🇺🇸 United StatesLeadWebsite

Tech Stack

Tools & technologies

LinuxPython

About the role

Key responsibilities & impact

Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs
Develop verification plans with traceability to system and hardware requirements
Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks
Build functional coverage models and drive code coverage analysis to closure
Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs
Establish and maintain regression suites, tracking coverage metrics and verification progress
Debug failures using waveform tools and simulation logs at the HDL and system level
Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement
Support hardware validation and board bring-up on target platforms
Ensure verification meets DO-254 and relevant safety standards
Author verification closure reports and coverage analysis summaries

Requirements

What you’ll need

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
2+ years of experience in FPGA/ASIC verification
Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches
Object-oriented programming principles
Industry simulators (Questa, VCS, Xcelium, or Vivado)
Git-based collaborative workflows including code review
Linux development environments
Strong communication and teamwork skills
Eligible to obtain and hold a U.S. Secret security clearance
5+ years of experience in FPGA/ASIC verification (Preferred)
Master’s degree in Electrical Engineering, Computer Engineering, or related field (Preferred)
DO-254, avionics verification standards for UAS, and safety-critical verification processes (Preferred)
SVUnit or equivalent unit-testing frameworks (Preferred)
Formal verification or CDC verification tools (Preferred)
Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI (Preferred)
Verification automation scripting (Python, Tcl, Makefile) (Preferred)
SoC and ARM-based embedded platforms (Preferred)
Verification automation, CI/CD integration, and Nix-based build environments (Preferred)

Benefits

Comp & perks

🌐 Worldwide ❌ Jobs You've Hidden ⭐️ Saved Jobs ✅ Applied Jobs ✉️ Email Alerts 👤 Account HIKINEX Website LinkedIn All Job Openings 201 - 500 employees 🤝 B2B 🎯 Recruiter B2B
Recruitment HIKINEX is a multi-channel integrated service provider that delivers outsourced sales, recruitment, virtual assistant, and marketing support to help companies scale quickly and reduce operating costs. The company offers sales-as-a-service (appointment setting, outbound sales, sales training), end-to-end recruiting and talent acquisition (sourcing, screening, ATS management, executive recruiting), virtual administrative support, and marketing/brand ambassador services. HIKINEX operates remotely out of San Francisco and emphasizes flexible, scalable staffing and operations solutions for B2B clients. FPGA Verification Engineer, Air Dominance and Strike Job not on LinkedIn 🔥 25 minutes ago 🏄 California – Remote ⏰ Full Time 🔴 Lead 🎯 Recruiter Apply Now Find Hiring Managers Customize resume for this job Report problem ☆ Save ☑️ Mark as applied ❌ Hide 📋 Description
Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs
Develop verification plans with traceability to system and hardware requirements
Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks
Build functional coverage models and drive code coverage analysis to closure
Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs
Establish and maintain regression suites, tracking coverage metrics and verification progress
Debug failures using waveform tools and simulation logs at the HDL and system level
Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement
Support hardware validation and board bring-up on target platforms
Ensure verification meets DO-254 and relevant safety standards
Author verification closure reports and coverage analysis summaries 🎯 Requirements
Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
2+ years of experience in FPGA/ASIC verification
Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches
Object-oriented programming principles
Industry simulators (Questa, VCS, Xcelium, or Vivado)
Git-based collaborative workflows including code review
Linux development environments
Strong communication and teamwork skills
Eligible to obtain and hold a U.S. Secret security clearance
5+ years of experience in FPGA/ASIC verification (Preferred)
Master’s degree in Electrical Engineering, Computer Engineering, or related field (Preferred)
DO-254, avionics verification standards for UAS, and safety-critical verification processes (Preferred)
SVUnit or equivalent unit-testing frameworks (Preferred)
Formal verification or CDC verification tools (Preferred)
Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI (Preferred)
Verification automation scripting (Python, Tcl, Makefile) (Preferred)
SoC and ARM-based embedded platforms (Preferred)
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Hard Skills & Tools

UVM verification environmentsSystemVerilogSystemVerilog Assertions (SVA)functional coverage modelsconstrained-random test sequencesregression suitesdebugging with waveform toolsverification automation scriptingDO-254 complianceobject-oriented programming

Soft Skills

strong communication skillsteamwork skills

Certifications

Bachelor’s degree in Electrical EngineeringBachelor’s degree in Computer EngineeringMaster’s degree in Electrical EngineeringMaster’s degree in Computer EngineeringU.S. Secret security clearance eligibility