VLSI Design Verification Manager – Slingshot ASIC Team

Hewlett Packard Enterprise

VLSI Design Verification Manager overseeing the design verification for Slingshot networking ASICs at Hewlett Packard Enterprise. Leading a team to ensure functional correctness and quality in high‑performance networking products.

Posted 5/14/2026full-timeFt. Collins • Colorado, Minnesota, Wisconsin • 🇺🇸 United StatesSeniorLead💰 $142,000 - $270,000 per yearWebsite

About the role

Key responsibilities & impact

Provide leadership and direction for a team responsible for all phases of pre‑silicon design verification, including verification planning, testbench development, coverage closure, regression management, and sign‑off reviews.
Define, own, and evolve design verification methodology, ensuring consistent, high‑quality verification practices across block, subsystem, and full‑chip scopes.
Ensure development of robust SystemVerilog/UVM‑based environments, including stimulus, scoreboards, checkers, assertions, and functional coverage.
Drive regression health, failure triage, root‑cause isolation, and closure of design issues in collaboration with logic design and architecture teams.
Manage project deliverables, schedules, and staffing to meet program milestones and quality goals.
Recruit, mentor, and develop engineers; set performance expectations and support career growth across junior through senior levels.
Identify and drive opportunities for process improvement, reuse, automation, and efficiency in verification workflows.
Communicate verification status, risks, and readiness clearly to management and cross‑functional partners.

Requirements

What you’ll need

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
Typically 10+ years of experience in VLSI design verification, with strong hands‑on background in pre‑silicon DV.
Strong understanding of SystemVerilog and UVM‑based verification methodologies.
Demonstrated technical leadership in design verification.
Ability to lead engineers through influence and mentorship.
Experience with verification planning, coverage‑driven verification, regression management, and sign‑off readiness.
Proficiency with DV workflows using industry EDA simulation tools.
Strong analytical and problem‑solving skills.
Excellent written and verbal communication skills.

Benefits

Comp & perks

Health & Wellbeing: comprehensive suite of benefits that supports physical, financial and emotional wellbeing.
Personal & Professional Development: investment in your career with specific programs catered to helping you reach career goals.
Unconditional Inclusion: celebrating individual uniqueness and allowing flexibility to manage work and personal needs.

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

SystemVerilogUVMdesign verificationverification planningtestbench developmentcoverage closureregression managementroot-cause isolationfunctional coverageEDA simulation tools

Soft Skills

leadershipmentorshipcommunicationanalytical skillsproblem-solvingproject managementcollaborationprocess improvementinfluencecareer development

Certifications

Bachelor’s degree in Electrical EngineeringMaster’s degree in Electrical EngineeringBachelor’s degree in Computer EngineeringMaster’s degree in Computer EngineeringBachelor’s degree in Computer ScienceMaster’s degree in Computer Science