Senior ASIC Design Engineer, Front End
Ethernovia
full-time
Posted on:
Location Type: Hybrid
Location: Toronto • Canada
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Job Level
About the role
- Responsible for all aspects of digital SoC design, from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis
- Work with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver advanced automotive communication semiconductors and systems.
- On the leading edge of the development and definition of advanced, high-performance custom silicon.
- Flesh out product definitions with precise specifications of an ASIC's internal and external interactions, data flow, processing algorithms across a number of disciplines, resource management, and software interfaces.
- Be a trusted self-starter who can work with very little guidance or oversight.
Requirements
- BS and/or MS in Electrical Engineering, Computer Science, or related field
- Minimum 10+ years of ASIC RTL design and/or architecture experience
- Proven track record with the development of complex SoCs
- Strong understanding of digital design fundamentals and methodologies
- In-depth knowledge of Verilog/System Verilog and simulation tools.
- Self-motivated and able to work effectively both independently and in a team
Benefits
- Pre IPO stock options
- Cutting edge technology
- World class team
- Competitive base salary
- Flexible hours
- Medical, dental and vision insurance for employees
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
digital SoC designmicro-architecture specificationRTLverificationsynthesislintCDCLECstatic timing analysisASIC design
Soft Skills
self-starterindependent workteam collaborationeffective communication
Certifications
BS in Electrical EngineeringMS in Electrical EngineeringBS in Computer ScienceMS in Computer Science