Eightfold

Staff ASIC IP, Block, Subsystem Design Verification Engineer

Eightfold

full-time

Posted on:

Location Type: Office

Location: Hyderabad • India

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Job Level

Lead

About the role

  • Be part of a skilled ASIC Team and work on new technology nodes
  • Verify IP/Block and sub-system from test plan creation to signoff
  • Ensure first pass product through multi-dimensional verification coverage
  • Mentor junior team members
  • Collaborate on core technical initiatives

Requirements

  • M.S./M.Tech, BS/BE (Electronics)
  • 6+ Years experience
  • Expertise in IP/Block/Subsystem verification
  • Proficient in AMBA protocols-APB/AHB/AXI
  • Experience with RTL debugging and testbench development
  • Strong knowledge of Verilog and System Verilog languages
Benefits
  • Health insurance
  • Retirement plans
  • Paid time off
  • Professional development
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
IP verificationBlock verificationSubsystem verificationAMBA protocolsAPBAHBAXIRTL debuggingTestbench developmentVerilog
Soft Skills
MentoringCollaboration
Certifications
M.S.M.TechBSBE