Associate Software Engineer – Hardware Emulation
Boeing
AssemblyAzureJ2EEJavaLinuxMavenTCP/IPUnix
Senior Runtime Software Engineer
d-Matrix
full-time
Posted on:
Origin: • 🇦🇺 Australia
Visit company websiteJob Level
Senior
Tech Stack
AssemblyJenkinsLinuxRTOS
About the role
- Work on architecture, development, and validation of firmware/software executed on the SoC’s multiple processors and low-level drivers and system programs that host the SoC
- Architect, document, and develop runtime firmware executing in various on-chip multi-core CPU subsystems and control all aspects of the AI subsystems
- Maximize hardware utilization, minimize communication bottlenecks, and maximize on-chip memory utilization
- Bring software up on FPGA platforms containing images of embedded CPU subsystems and debug using JTAG-connected IDE
- Develop firmware solutions that can be developed and tested ahead of the availability of the AI subsystem hardware
- Determine delivery schedule and ensure software meets d-Matrix coding and methodology guidelines
- Collaborate with hardware teams to interpret specifications and suggest changes to improve utilization, throughput, or reduce power
- Collaborate with SW teams (AU and US), SW quality & test team (US and India), and HW verification team for SoC-level DV simulations and emulation
- Develop and debug code on FPGA-based systems and SystemC models of AI subsystems and SoC
- Port software to big-iron emulation systems (e.g., Veloce, Palladium) containing final RTL
- Bring up the software on AI subsystem hardware and validate silicon and software performance
Requirements
- BS/MS Preferred degree in computer science, computer engineering, or similar
- Experience with multi-threaded C programming on multi-core CPUs running an RTOS in both AMP and SMP configurations
- Understanding of methods used to synchronize many-core and many-CPU architectures
- Managing static resources without an MMU
- Zephyr OS experience is an advantage
- Experience with PIC programming and developing interrupt service routines
- Knowledge of bootloaders and Linux device drivers is an advantage
- Ability to interpret HW-centric data sheets and register definitions to determine how to best program the architecture
- Ability to work with HW design teams at both the early definition phase and during development
- Experience with FPGA-based development and system emulators is an advantage
- Ability to work with SW architecture teams and propose considered feedback on SW architecture
- Knowledge of assembly language programming of pipelined RISC architecture processors
- Runtime FW debugging on target hardware using IDE via JTAG
- Experience with current SW development methodologies, including Git, Kanban, sprints, Jenkins, and Jira (or similar)
- Experience collaborating in SW development projects that span multiple time zones and geographical regions
- Ability to work autonomously without day-to-day supervision and deliver on agreed milestones
- Skills that include unit-level testing, documentation, and interfacing with QA & test teams
- Skills in mathematical quantization, floating-point arithmetic, block floating-point, sparse matrix processing, and linear algebra is an advantage
