Full-stack Engineer

• Work on architecture, development, and validation of firmware/software executed on the SoC’s multiple processors and low-level drivers and system programs that host the SoC
• Architect, document, and develop runtime firmware executing in various on-chip multi-core CPU subsystems and control all aspects of the AI subsystems
• Maximize hardware utilization, minimize communication bottlenecks, and maximize on-chip memory utilization
• Bring software up on FPGA platforms containing images of embedded CPU subsystems and debug using JTAG-connected IDE
• Develop firmware solutions that can be developed and tested ahead of the availability of the AI subsystem hardware
• Determine delivery schedule and ensure software meets d-Matrix coding and methodology guidelines
• Collaborate with hardware teams to interpret specifications and suggest changes to improve utilization, throughput, or reduce power
• Collaborate with SW teams (AU and US), SW quality & test team (US and India), and HW verification team for SoC-level DV simulations and emulation
• Develop and debug code on FPGA-based systems and SystemC models of AI subsystems and SoC
• Port software to big-iron emulation systems (e.g., Veloce, Palladium) containing final RTL
• Bring up the software on AI subsystem hardware and validate silicon and software performance

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