Senior Manager, ATE Test Engineer
d-Matrix
full-time
Posted on:
Location Type: Hybrid
Location: Santa Clara • California • 🇺🇸 United States
Visit company websiteSalary
💰 $161,300 - $268,800 per year
Job Level
Senior
Tech Stack
Python
About the role
- Lead ATE Test solutions
- Develop and oversee SoC test strategy
- Interact with manufacturing partners
- Define and implement ATE programs
- Own the product from design to production ramp
- Identify and drive cost reduction in tests
- Improve CP and FT yield
- Identify high yield fallout bins and enhance programs to minimize them
Requirements
- Strong academic and technical background in electrical engineering. At minimum, a Bachelor’s in EE is required, and a Master’s is preferred.
- 10 + year experience developing & releasing complex SoC/silicon products to high volume manufacturing.
- Experience with developing high pin count wafer sort probe cards and load boards
- Has implemented Scan, at speed Scan, MBist, Serdes loopback
- Working knowledge of high-speed protocols like PCIe, LPDDRx, HBM, etc.
- Professional attitude with ability to execute on multiple tasks with minimal supervision.
- Strong team player with good communication skills to work alongside a team of high caliber engineers.
- Entrepreneurial, open-mind behavior and can-do attitude.
- Hands-on experience with high-speed SoC test program/hardware development on Advantest 93k test platform.
- Collaboration with design DFT team to define test strategy, create and own test plan.
- Familiar with high-speed and high power load board design techniques
- Proven track record of implementing ATE patterns to optimize tester resources and minimize ATE test time while maintaining product quality.
- Strong knowledge and development of DFT techniques implemented in silicon that provide maximum defect and parametric device coverage – AC/DC SCAN, MBIST, DBIst, DSerDes, DDR, D2D, DIMC and other functional tests.
- Strong knowledge of lot genealogy from 2DiD bar code down to ECID in eFuse for device serial number, chiplet Id and die information.
- Expertise in production test of high speed SerDes operating at 16Gbps and higher.
- Skilled in ATE programming, silicon/ATE bring-up, bench-ATE correlation and debug.
- Experience with lab equipment including protocol analyzers and oscilloscopes.
- Experience with data conversion between STDF file format into csv file format using scripts including extracting ECID reside with eFuse block
- Proficiency in modern programming languages such as C/C++, Python.
Benefits
- Medical/Dental/Vision/401k
- Diverse package of benefits centered around the wellbeing of our employees and their loved ones.
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
SoC test strategyATE programmingDFT techniqueshigh-speed protocolshigh-speed SoC test program developmentdata conversionC/C++PythonScanMBIST
Soft skills
communication skillsteam playerentrepreneurial attitudeopen-minded behaviorcan-do attitudeability to execute on multiple tasksminimal supervision
Certifications
Bachelor’s in Electrical EngineeringMaster’s in Electrical Engineering