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Cree

Design Engineering Manager – Power Management

Cree

Lead IC Design Engineer overseeing the development of Power Management ICs at Wolfspeed. Focused on high-voltage gate drivers and advanced silicon capacitor technologies.

Posted 7/18/2026full-timeRemote • 🇺🇸 United StatesSeniorLeadWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in high-voltage gate driver architecture, IC design, and mixed-signal simulation, with a strong focus on silicon capacitor integration and advanced packaging techniques. Proven ability to lead design verification and provide technical guidance to engineering teams throughout the IC development lifecycle.

Highest-signal resume keywords
High-Voltage Gate Driver ArchitectureIC Design ExperienceCadence Virtuoso ProficiencyLaboratory Debugging SkillsMulti-Chip Module Design

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
Transistor-Level DesignAnalog and Mixed-Signal DesignSchematic CaptureTape-Out ExecutionParasitic ModelingHigh-Frequency CharacterizationGaN Power FET RequirementsSiC Power FET Requirements
Soft Skills
Technical GuidanceCode ReviewDesign Verification Oversight
Tools & Technologies
Cadence VirtuosoSpectreMentor CalibreOscilloscopeSpectrum AnalyzerHigh-Voltage Test Equipment
Certifications & Qualifications
Master’s in Electrical EngineeringPh.D. in Electrical Engineering
Industry Keywords
Integrated Circuit DesignSilicon Capacitor FabricationSystem-in-Package DesignAdvanced Packaging Techniques

About the role

Key responsibilities & impact
  • Define and architect high-voltage gate drivers, IPM protection circuits, and integrated silicon capacitor structures.
  • Perform transistor-level design, simulation, and verification of complex analog and mixed-signal power blocks.
  • Lead the integration of passive silicon capacitors into advanced multi-chip modules and system-in-package topologies.
  • Provide technical guidance, code reviews, and design verification oversight to junior and mid-level engineering staff.
  • Drive the execution of the IC development lifecycle from schematic capture and layout supervision through tape-out.
  • Partner with product and test engineering to characterize, debug, and validate first-silicon in the lab.

Requirements

What you’ll need
  • Master’s or Ph.D. in Electrical Engineering or a related technical field.
  • Minimum of 7+ years of hands-on IC design experience, with a proven track record of successful production tape-outs.
  • Deep technical knowledge of high-voltage gate driver architectures, level shifters, and isolation techniques.
  • Strong understanding of silicon capacitor fabrication processes, parasitic modeling, and high-frequency characterization.
  • Expert proficiency with Cadence Virtuoso, Spectre, Mentor Calibre, and mixed-signal simulation methodologies.
  • Exceptional laboratory debugging skills using oscilloscopes, spectrum analyzers, and high-voltage test equipment.
  • Experience with GaN and SiC power FET driving requirements.
  • Knowledge of advanced multi-chip module (MCM) packaging and SiP (System-in-Package) design.

Benefits

Comp & perks
  • Health insurance
  • Professional development opportunities
  • Flexible work arrangements