Senior ASIC Design Engineer
Cornelis Networks
Ethernet ASIC Design Engineer
Cornelis Networks
full-time
Posted on:
Location Type: Remote
Location: Remote • California • 🇺🇸 United States
Visit company websiteJob Level
SeniorLead
Tech Stack
TCP/IP
About the role
- Design and implement advanced Ethernet protocols for next-generation Ethernet switch ASICs
- develop microarchitecture specifications for Ethernet protocol blocks
- implement Ethernet protocols in Transmit and Receive pipelines using Verilog/System Verilog
- collaborate with verification engineers to create test plans
- define timing constraints for RTL blocks
- support post-silicon validation
- contribute to performance optimization and power-aware design strategies
Requirements
- 15+ years of ASIC design experience
- 10+ years of relevant experience in networking hardware design
- proven expertise in 50G, 100G, 400G Ethernet MAC/PCS protocols
- experience with TCP/IP, RDMA/RoCE, IPSec
- B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field
- proficiency in Verilog and System Verilog
- familiarity with timing closure and modern physical design methodologies
- strong verbal and written communication skills
Benefits
- health and retirement benefits
- competitive compensation package
- equity, cash, and incentives
- medical, dental, and vision coverage
- disability and life insurance
- dependent care flexible spending account
- accidental injury insurance
- pet insurance
- generous paid holidays
- 401(k) with company match
- Open Time Off (OTO)
- sick time
- bonding leave
- pregnancy disability leave
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
ASIC designEthernet protocolsVerilogSystem Verilogtiming constraintsperformance optimizationpower-aware designTCP/IPRDMAIPSec
Soft skills
communication skills
Certifications
B.S. in Computer EngineeringM.S. in Computer EngineeringB.S. in Electrical EngineeringM.S. in Electrical Engineering
