Hardware Engineering Technical Leader

Cisco

Hardware Engineering Technical Leader designing and validating high-speed optical interconnect hardware for Cisco’s Acacia. Resolving complex telecommunications and electro-optical transmission challenges during NPI.

Posted 8/17/2026full-timeMaynard • Massachusetts • 🇺🇸 United StatesSenior💰 $151,300 - $216,200 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive experience in hardware design, validation, and debugging, with a strong focus on telecommunications and high-speed electro-optical transmission. Proficient in using advanced simulation and PCB layout tools to ensure high-performance hardware solutions.

Highest-signal resume keywords

Bachelor's Degree10+ Years Industry ExperienceHigh-Speed PCB LayoutAnalog/RF Simulation ToolsDebugging and Lab Skills

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills

Transmission Line TheoryDC-DC Power ConvertersPower Integrity SimulationsDigital Control LoopsDSP Functions

Tools & Technologies

LTSpiceADSVxDesignerAllegro PCBSiP Layout Tools

Industry Keywords

TelecommunicationsHigh-Speed SignalingOptical ComponentsLasersDWDM Technologies

Tech Stack

Tools & technologies

Python

About the role

Key responsibilities & impact

Contribute to the hardware life cycle of Acacia’s products
Work within a multidisciplinary hardware, software, optics, and DSP engineering organization
Contribute to the architecture, specification, design, and validation of new hardware
Apply telecommunications and high-speed electro-optical transmission expertise to resolve complex problems during the NPI phase
Work as an individual contributor and hit the ground running
Debug hardware and perform lab work using state-of-the-art test equipment

Requirements

What you’ll need

Bachelor’s degree and 10+ years of relevant industry experience
Experience with transmission line theory and effects, including microstrip, stripline, and CPW
Experience with high-efficiency DC-DC power converters
Experience with analog/RF simulation tools such as LTSpice and ADS
Experience with VxDesigner and working knowledge of Allegro PCB and SiP Layout tools
Experience working with PCB layout and constraint management tools for high-speed signaling above 50+ GHz
Experience with debugging and lab skills using state-of-the-art test equipment
Master’s degree preferred
Experience with Power Integrity simulations and tools preferred
Knowledge of optical components, including lasers, modulators, detectors, and DWDM technologies, preferred
Understanding and implementation of digital control loops and DSP functions preferred
Working knowledge of Python preferred

Benefits

Comp & perks

Medical, dental and vision insurance
401(k) plan with Cisco matching contribution
Paid parental leave
Short- and long-term disability coverage
Basic life insurance
Cisco restricted stock unit grants may be available
10 paid holidays per full calendar year
1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
Paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time per full calendar year for non-exempt employees
Flexible vacation time off program with no defined limit for eligible exempt employees
80 hours of sick time off provided on hire date and each January 1st thereafter
Up to 80 hours of unused sick time carried forward
Additional paid time away for critical or emergency family issues
Optional 10 paid volunteer days per full calendar year
Annual bonuses may be available for non-sales roles
Opportunities to grow and build at Cisco
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