Senior Hardware Engineer – SoC Electrical Failure Analysis

Cisco

Senior Hardware Engineer at Cisco ensuring ASIC quality and reliability through collaboration and validation. Engaging in failure analysis and improving product performance across the hardware lifecycle.

Posted 7/22/2026full-timeSan Jose • California • 🇺🇸 United StatesSenior💰 $165,000 - $241,400 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in Electrical Post-Silicon Validation, SoC Failure Analysis, and High-Speed Mixed-Signal Design, with a strong focus on improving product performance and reliability. Proficient in using electrical diagnostics and measurement equipment while collaborating effectively with cross-functional teams.

Highest-signal resume keywords

Electrical Post-Silicon ValidationSoC Failure AnalysisHigh-Speed Mixed-Signal DesignPython Software DevelopmentElectrical Diagnostics Equipment

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Electrical Post-Silicon ValidationSoC Failure AnalysisHigh-Speed Mixed-Signal DesignDesign For Test (DFT)Memory DesignPower IntegritySignal IntegrityPhysical DesignPython ProgrammingC++ Programming

Soft Skills

CollaborationProblem SolvingLeadership

Tools & Technologies

OscilloscopesVNABERTLogic Analyzers

Industry Keywords

ASIC VerificationDevice Performance AnalysisNetworking FundamentalsWaveform AnalysisPower Supply Stability

Tech Stack

Tools & technologies

Python

About the role

Key responsibilities & impact

Engage in dynamic collaboration with verification engineers, designers, and cross-functional teams.
Ensure the successful verification and quality of the ASIC throughout its lifecycle.
Lead and participate in failure analysis efforts, determining contributing factors and corrective actions.
Lead activities aiming at improving product performance, yield, and reliability.
Define, and refine post silicon validation plans covering functionality, performance characterization, and reliability.
Capture, analyze, and interpret device performance, waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise.
Validate system-level behavior under real-world networking workloads.
Contribute to the chip screening test and observability software library (Python, C++).

Requirements

What you’ll need

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 6+ years of relevant experience, or Master's degree in Electrical Engineering, Computer Engineering, or related field and 3+ years of relevant experience, or PhD in Electrical Engineering, Computer Engineering, or related field and 1+ years of relevant related work experience.
Relevant experience: Electrical post-silicon validation (Vmin, leakage, PVT characterization, …), SoC failure analysis, Power and signal integrity, High speed mixed-signal design, DFT, SRAM design and/or integration.
Experience in driving SoC failure analysis efforts.
Experience in brining up complex SoC
Experience with electrical diagnostics and measurement equipment (Oscilloscopes, VNA, BERT, logic analyzers...)
Experience in high-speed physical interfaces
Experience in design for test (DFT)
Experience in physical and/or logic design
Experience in memory design and MBIST
Experience with schematics and layout files for sophisticated electrical systems
Software development experience with Python, C++ or similar language
Understanding of networking fundamentals and protocols.

Benefits

Comp & perks

medical, dental and vision insurance
401(k) plan with a Cisco matching contribution
paid parental leave
short and long-term disability coverage
basic life insurance
10 paid holidays per full calendar year, plus 1 floating holiday
1 paid day off for employee’s birthday
paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period
flexible vacation time off program
80 hours of sick time off provided on hire date and each January 1st thereafter
up to 80 hours of unused sick time carried forward from one calendar year to the next
additional paid time away for critical issues
10 paid days per full calendar year to volunteer