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Cisco

Analog/Mixed-Signal IC Design Engineer

Cisco

Analog/mixed-signal IC Design Engineer designing high speed ICs for optical communications products at Acacia. Collaborating with engineering teams to architect and implement advanced CMOS designs.

Posted 6/1/2026full-timeSan Jose • California • 🇺🇸 United StatesSeniorLead💰 $168,800 - $241,200 per yearWebsite

About the role

Key responsibilities & impact
  • Collaborate with other Acacia mixed-signal engineers to provide optimized design that will integrate into the ASIC
  • Interact with other Acacia groups including digital/DSP design, system design, package design, and module design
  • Architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products
  • Lead efforts for a large block on a complex chip
  • Mentor team members and track deliverables
  • Participate in peer review of complex IC designs and provide solid design methodology from conception to production
  • Collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met
  • Solve difficult problems and push the boundaries of high-speed AMS circuits

Requirements

What you’ll need
  • Bachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 3 years of related experience
  • Experience in design, simulation and measurement of high speed ICs in at least 3 of the areas listed below:
  • * High Speed Serial Links utilizing serializers, deserializers, and data convertors
  • * Modeling requirements for system link simulations
  • * High Performance Output Drivers
  • * High Performance Phase Locked Loops
  • * Efficient clock transmission/propagation
  • * Opamps and Programmable Gain Amplifiers
  • * Equalization techniques
  • Experience with electrical transceiver applications including backplane and cable communications
  • Experience in FinFET and GAA technologies
  • High-frequency layout experience including floorplaning (power/ground, digital/analog signal routing), passives components (inductors, transformers, and transmission-lins)
  • Experience in design for manufacturability including characterization over PVT, electromigration analysis, self-heating, and IR drop analysis
  • Experience in laboratory validation including ESD practices/methodology and construction of test setups
  • Experience in design software including Cadence (Virtuoso), Specture/APS/SpectreX, layout validation tools (Virtuoso and Calibre), EMX, mixed-signal simulations in AMS, and Matlab

Benefits

Comp & perks
  • Medical, dental and vision insurance
  • 401(k) plan with a Cisco matching contribution
  • Paid parental leave
  • Short and long-term disability coverage
  • Basic life insurance
  • 10 paid holidays per full calendar year
  • 1 floating holiday for non-exempt employees
  • 1 paid day off for employee’s birthday
  • Paid year-end holiday shutdown
  • 4 paid days off for personal wellness
  • 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
  • Flexible vacation time off program
  • 80 hours of sick time off provided on hire date and each January 1st thereafter
  • Up to 80 hours of unused sick time carried forward from one calendar year to the next
  • Optional 10 paid days per full calendar year to volunteer

ATS Keywords

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Hard Skills & Tools
design of high speed ICssimulation of high speed ICsmeasurement of high speed ICshigh speed serial linksoutput driversphase locked loopsclock transmissionopampsprogrammable gain amplifiersequalization techniques
Soft Skills
collaborationmentoringproblem solvingpeer reviewleadership