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Cisco

Physical Design Engineer II

Cisco

Physical Design Engineer at Cisco focusing on the technical execution of high-performance ASIC designs and RTL-to-GDSII implementation.

Posted 5/21/2026full-timeMaynard • Massachusetts, Texas • 🇺🇸 United StatesJuniorMid-Level💰 $123,600 - $200,100 per yearWebsite

Tech Stack

Tools & technologies
PerlPython

About the role

Key responsibilities & impact
  • focus on the technical execution of high-performance ASIC designs
  • own the RTL-to-GDSII implementation flow for advanced semiconductor nodes
  • responsible for the successful delivery of assigned blocks from specification through to tapeout
  • Implement end-to-end RTL-to-GDSII implementation for advanced nodes (sub-7nm)
  • Perform floor planning, place and route, and clock/power distribution
  • Conduct static timing analysis (STA) and drive timing closure for multi-mode/multi-corner designs
  • Manage the physical design of assigned blocks
  • Collaborate with the Physical Design team to debug and resolve complex physical implementation issues
  • Implement ECO strategies and support sign-off processes
  • Contribute to the refinement of design methodologies and standard processes within the engineering team
  • Document and track progress for assigned project achievements

Requirements

What you’ll need
  • Completion, within the past 3 years, or current enrollment with expected completion within 12 months, a Bachelors + 2 years of relevant experience or Masters + 0 years of relevant experience
  • Relevant fields include Electrical Engineering, Computer Engineering, Computer Science, or a closely related field
  • Hands-on experience in ASIC physical design and implementation
  • Working knowledge with hierarchical floorplanning, clock and power distribution, global signal and I/O planning along with physical convergence, timing closure, and hierarchical design methodology
  • Understanding power integrity and EMIR analysis
  • Experience with Scripting using languages such as TCL, Perl, Python, etc.
  • Place & Route experience using tools such as Cadence Innovus or Synopsys ICC2
  • Experience formal equivalence check, timing closure, EMIR, physical verification DRC/LVS
  • Experience with block level EMIR closure
  • Physical Verification experience including tools such as Synopsys ICV or Mentor Calibre

Benefits

Comp & perks
  • medical, dental and vision insurance
  • a 401(k) plan with a Cisco matching contribution
  • paid parental leave
  • short and long-term disability coverage
  • basic life insurance
  • 10 paid holidays per full calendar year, plus 1 floating holiday
  • 1 paid day off for employee’s birthday
  • paid year-end holiday shutdown
  • 4 paid days off for personal wellness
  • 16 days of paid vacation time per full calendar year
  • flexible vacation time off program
  • 80 hours of sick time off provided on hire date
  • additional paid time away may be requested to deal with critical or emergency issues
  • Optional 10 paid days per full calendar year to volunteer

ATS Keywords

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Hard Skills & Tools
ASIC designRTL-to-GDSII implementationstatic timing analysisfloor planningplace and routeclock distributionpower distributionECO strategiestiming closurephysical design
Soft Skills
collaborationproblem-solvingdocumentationproject management