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ASIC Design Verification Engineer II
CiscoASIC Design Verification Engineer joining Cisco to collaborate on advanced communications silicon designs. Engaging in system architecture, high-speed logic design, and project leadership from concept to implementation.
Posted 4/30/2026full-timeSan Jose • California • 🇺🇸 United StatesJuniorMid-Level💰 $123,600 - $200,100 per yearWebsite
Tech Stack
Tools & technologiesLinuxPerlPython
About the role
Key responsibilities & impact- Join our award-winning ASIC team
- Collaborate with top industry talent to design and deliver groundbreaking communications and network processing silicon
- Contribute to system and processor architecture, high-speed logic design and verification, digital signal processing, memory and custom library development
- Work with the latest VLSI techniques and deep submicron technologies
- Own projects from concept to in-house physical implementation
Requirements
What you’ll need- Completion within the past 3 years, or current enrollment with expected completion within 12 months, Bachelors + 2 years of relevant experience or Masters + 0 years of relevant experience
- Familiarity with hardware description languages (HDLs), such as Verilog or VHDL.
- Experience with RTL design and simulation tools (e.g., Synopsys, Cadence, Mentor Graphics).
- Exposure to scripting languages (e.g., Python, Perl, TCL) for automation.
- Familiarity with ASIC/SoC design flow including synthesis, place & route, and timing closure.
- Experience with ASIC verification methodologies (e.g., UVM, SystemVerilog )
- Understanding of physical design and DFT principles
- Familiarity with Linux-based development environments
- Ability to adapt to new technologies and problem-solve sophisticated engineering challenges
- Excellent organizational, teamwork, and communication skills.
Benefits
Comp & perks- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- Non-exempt employees receive 16 days of paid vacation time per full calendar year
- Exempt employees participate in Cisco’s flexible vacation time off program
- 80 hours of sick time off provided on hire date
- up to 80 hours of unused sick time carried forward from one calendar year to the next
- Optional 10 paid days per full calendar year to volunteer
- Employees are also eligible to earn annual bonuses
ATS Keywords
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Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
ASIC designRTL designdigital signal processinghigh-speed logic designhardware description languagesVerilogVHDLASIC verification methodologiesUVMSystemVerilog
Soft Skills
organizational skillsteamworkcommunication skillsproblem-solvingadaptability