
Senior ASIC Physical Design Engineer
Cisco
full-time
Posted on:
Location Type: Office
Location: Austin • Massachusetts • Texas • United States
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Salary
💰 $146,700 - $214,800 per year
Job Level
About the role
- Own and drive RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm)
- Define and execute hierarchical floor planning, place and route, clock and power distribution, and timing convergence strategies
- Perform static timing analysis (STA), setup reviews, and sign-offs for multi-mode/multi-corner designs; develop automated scripts within STA tools
- Implement and manage timing ECO strategies
- Collaborate closely with RTL and DFT designers to debug and root-cause physical implementation issues related to design, tools, etc.
- Evaluate and implement new timing methodologies; provide creative debugging solutions
- Contribute to best practices and drive methodology alignment across projects
Requirements
- Bachelors degree in Computer or Electrical Engineering and 7+ years of related experience, or Masters degree in Computer or Electrical Engineering and 4+ years of related experience
- Hands-on experience in ASIC physical design and implementation
- Experience with place & route using tools such as Cadence Innovus, Synopsys ICC2, or industry equivalent tools
- Experience with industry standard CAD methodologies (Cadence, Synopsys, or Mentor)
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
- flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward from one calendar year to the next
- additional paid time away may be requested to deal with critical or emergency issues for family members
- optional 10 paid days per full calendar year to volunteer
- possible annual bonuses
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
RTL-to-GDSII implementationhierarchical floor planningplace and routeclock distributionpower distributiontiming convergencestatic timing analysistiming ECO strategiesdebuggingtiming methodologies
Soft Skills
collaborationproblem-solvingcreativity
Certifications
Bachelors degree in Computer EngineeringBachelors degree in Electrical EngineeringMasters degree in Computer EngineeringMasters degree in Electrical Engineering