BTA Design Services Inc.

Mechanical Engineer

• Architect and RTL design complex IP blocks for 4G/5G Radio Units which are part of a system aligned with 3GPP and O-RAN Alliance specifications
• Carry out RTL logic design in Verilog or System Verilog, FPGA synthesis and backend, timing optimization and closure
• Ensure correct block and system functionality utilizing advanced UVM simulation verification techniques and system-level FPGA validation
• Collaborate with the broader FPGA design team, system level Radio Unit team and software team to ensure overall product integrity

Senior FPGA Design Engineer – 5G

Engineer

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