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BLUE ORIGIN

Senior ASIC Design Engineer

BLUE ORIGIN

ASIC Design Validation Engineer working to validate RFIC/ASIC designs for Blue Origin's satellite communications. Collaborating on verification methodologies and managing test planning in various environments.

Posted 6/19/2026full-timeSan Diego • California, Texas, Washington • 🇺🇸 United StatesSenior💰 $230,398 - $322,556 per yearWebsite

About the role

Key responsibilities & impact
  • Work in the Design Validation team ensuring RFIC/ASIC designs culminate in validated integrated circuits
  • Drive verification methodologies
  • Manage test planning and coverage closure
  • Ensure seamless portability across multiple verification environments including emulation, FPGA, and silicon bring-up
  • Verify complex SoC designs using System Verilog
  • Conduct formal verification and functional coverage
  • Collaborate in test planning and tracking, support post-silicon bring up

Requirements

What you’ll need
  • BS, MS in Electrical Engineering or a related technical field
  • 8+ years of experience
  • Deep working knowledge and hands on experience in innovative verification flows.

Benefits

Comp & perks
  • Medical, dental, vision, basic and supplemental life insurance
  • Paid parental leave
  • Short and long-term disability
  • 401(k) with a company match of up to 5%
  • Education Support Program
  • Stock Options for all regular employees (working at least 20 hours/week)
  • Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays
  • Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion.

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Hard Skills & Tools
RFIC designASIC designverification methodologiestest planningcoverage closureSystem Verilogformal verificationfunctional coverageSoC designpost-silicon bring-up
Certifications
BS in Electrical EngineeringMS in Electrical Engineering