Principal ASIC Design Verification Engineer

BLUE ORIGIN

Principal ASIC Design Verification Engineer at Blue Origin focusing on next-gen satellite communication systems design and verification. Leading verification strategies and methodologies across complex silicon programs.

Posted 6/12/2026full-timeLos Angeles • California, Texas, Washington • 🇺🇸 United StatesLead💰 $269,175 - $376,843 per yearWebsite

About the role

Key responsibilities & impact

Define end-to-end verification strategy for large Satellite communication ASIC or SoC programs
Establish verification methodologies, infrastructure, and signoff criteria across block, subsystem, and SoC levels
Lead verification planning for complex communication functions such as modem pipelines, FEC engines, digital beamforming, packet processing, and control fabrics
Drive alignment among design, architecture, systems, firmware, and validation teams
Evaluate verification completeness through coverage, assertions, formal analysis, emulation, and silicon correlation
Resolve critical technical issues and direct root-cause analysis for the most complex functional failures
Guide development of reusable VIP, reference models, and regression automation frameworks
Mentor technical leaders and raise the overall verification maturity of the organization
Influence future verification roadmap, tool strategy, and reuse models

Requirements

What you’ll need

BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field
12+ years of ASIC/SoC verification experience
Expert-level knowledge of System Verilog, UVM, assertions, and verification signoff methodology
Proven success leading verification for complex chips or multiple tape-outs
Strong understanding of communication signal-processing hardware and system-level integration
Excellent technical leadership and cross-organizational communication skills
Deep expertise in Space based communications, digital modems, phased-array processing, or payload processing (preferred)
Experience with formal property verification, emulation, and performance validation (preferred)

Benefits

Comp & perks

Medical, dental, vision, basic and supplemental life insurance
Paid parental leave
Short and long-term disability
401(k) with a company match of up to 5%
Education Support Program
Stock Options for all regular employees (working at least 20 hours/week)
Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours
Up to 14 company-paid holidays
Individual contributions and ability to share in the company's results

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

System VerilogUVMassertionsverification signoff methodologyformal property verificationemulationperformance validationverification methodologiesregression automation frameworksroot-cause analysis

Soft Skills

technical leadershipcross-organizational communicationmentoringinfluencingproblem-solving

Certifications

BS in Electrical EngineeringMS in Electrical EngineeringPhD in Electrical EngineeringBS in Computer EngineeringMS in Computer EngineeringPhD in Computer Engineering