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BLUE ORIGIN

Director – ASIC Design Verification

BLUE ORIGIN

ASIC Design Verification Director at Blue Origin leading complex digital ASIC and SoC verification for space-based communications applications. Driving strategy and execution with cross-functional collaboration for high-quality silicon.

Posted 4/16/2026full-timeCentral Texas • California, Texas, Washington • 🇺🇸 United StatesLead💰 $230,773 - $323,081 per yearWebsite

About the role

Key responsibilities & impact
  • Lead verification of complex digital ASIC and SoC designs for space-based communications applications.
  • Define and implement verification strategy across block, subsystem, and SoC levels.
  • Drive development of robust verification environments using System Verilog, UVM, assertions, coverage-driven verification, and formal methods.
  • Ensure comprehensive verification of datapath, control, interface, protocol, and integration behavior.
  • Establish verification signoff criteria and drive closure for functional coverage, regressions, assertions, and quality metrics.
  • Partner closely with ASIC design, systems engineering, architecture, DFT, physical design, FPGA, firmware, validation, and program management teams.
  • Build, lead, and develop high-performing verification teams through hiring, mentoring, and performance management.
  • Set priorities, allocate resources, and align staffing with program schedules and technical needs.
  • Improve verification methodology, reusable infrastructure, automation frameworks, and development processes.
  • Support emulation, FPGA prototyping, silicon bring-up, and pre-silicon/post-silicon correlation activities as needed.

Requirements

What you’ll need
  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field.
  • Strong experience in ASIC/SoC verification for complex digital designs.
  • Deep expertise in System Verilog and UVM.
  • Strong understanding of constrained-random verification, functional coverage, assertions, scoreboards, reference models, regression planning, debug, and verification closure.
  • Experience verifying high-performance digital systems with both control logic and high-throughput datapaths.
  • Proven technical leadership and multi-functional execution skills.
  • Strong communication, organizational, and problem-solving skills.
  • For Manager level: typically 8+ years of ASIC/SoC verification experience, including leadership of a verification team, major subsystem, or chip partition.
  • For Director level: typically 12+ years of ASIC/SoC verification experience and 5+ years of people management experience, including leadership of senior engineers, leads, and/or managers.

Benefits

Comp & perks
  • Medical, dental, vision, basic and supplemental life insurance
  • Paid parental leave
  • Short and long-term disability
  • 401(k) with a company match of up to 5%
  • Education Support Program
  • Paid Time Off: Up to four (4) weeks per year bases on weekly scheduled hours, and up to 14 company-paid holidays.
  • Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion. Bonus amounts and eligibility are not guaranteed and subject to change and cancellation.

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools
ASIC verificationSoC verificationSystem VerilogUVMconstrained-random verificationfunctional coverageassertionsregression planningdebugverification closure
Soft Skills
technical leadershipmulti-functional executioncommunicationorganizationalproblem-solvingmentoringperformance managementprioritizationresource allocationstaffing alignment