Senior ASIC Design Verification Engineer
BLUE ORIGIN
full-time
Posted on:
Location Type: Hybrid
Location: Los Angeles • California • Washington • United States
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Salary
💰 $197,529 - $276,539 per year
Job Level
About the role
- Lead verification planning and execution for complex blocks or subsystems
- Develop sophisticated UVM environments, reference models, scoreboards, protocol monitors, and assertions
- Translate architecture and design specifications into comprehensive verification strategies and measurable coverage goals
- Drive functional coverage closure, regression health, and verification signoff readiness
- Identify verification gaps, corner cases, and high-risk scenarios early in the development cycle
- Collaborate closely with design, systems, DFT, firmware, and physical design teams
- Review testbench architecture, stimulus quality, and debug methodologies for technical excellence
- Mentor junior engineers in verification standard processes
- Support bring-up, emulation, prototyping, and post-silicon debug activities as needed
Requirements
- BS or MS in Electrical Engineering, Computer Engineering, or related field
- 5–8+ years of ASIC/SoC verification experience
- Deep hands-on expertise in System Verilog and UVM
- Strong understanding of verification planning, assertions, and coverage closure
- Experience verifying complex digital control and datapath logic
- Proven debugging capability across RTL, testbench, and system interactions
- Ability to work effectively across multidisciplinary engineering teams
Benefits
- Medical, dental, vision, basic and supplemental life insurance
- Paid parental leave
- Short and long-term disability
- 401(k) with a company match of up to 5%
- Education Support Program
- Up to four (4) weeks paid time off per year based on weekly scheduled hours
- Up to 14 company-paid holidays
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
System VerilogUVMverification planningassertionscoverage closuredebuggingRTLtestbenchdigital control logicdatapath logic
Soft Skills
collaborationmentoringcommunicationproblem-solvingleadership