Senior Digital Design Engineer

Analog Devices

Senior Digital Design Engineer developing RTL for mixed-signal SoCs at Analog Devices. Collaborating with cross-functional teams to deliver solutions for data centers and energy infrastructure.

Posted 5/25/2026full-timeLimerick • 🇮🇪 IrelandSeniorWebsite

Tech Stack

Tools & technologies

Python

About the role

Key responsibilities & impact

Develop and verify RTL for digital blocks and subsystems; ensure functional correctness and timing closure
Perform synthesis, static timing analysis, and support design-for-test (DFT) insertion and pattern generation
Collaborate with analog, firmware, and validation teams to integrate digital content into mixed-signal SoCs
Assist with silicon bring-up and debug; support lab measurements and correlation to simulation
Contribute to methodology improvements and automation initiatives

Requirements

What you’ll need

BS in Electrical or Computer Engineering (or equivalent)
4+ years of experience in ASIC/SoC digital design
Proficiency in Verilog/SystemVerilog and scripting languages (Python, C)
Familiarity with RTL-to-GDS flows (e.g., Genus, Innovus, Tempus, Conformal)
Understanding of DFT concepts and basic test strategies
Working knowledge of analog circuit operation and lab practices
Strong problem-solving skills and ability to work independently with minimal supervision
Good organization; written and verbal communication skills.

Benefits

Comp & perks

Analog Devices rewards performance, innovation, and collaboration.

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

RTL developmentsynthesisstatic timing analysisdesign-for-test (DFT)VerilogSystemVerilogPythonCRTL-to-GDS flowsanalog circuit operation

Soft Skills

problem-solvingindependenceorganizationwritten communicationverbal communication

Certifications

BS in Electrical EngineeringBS in Computer Engineering