Staff Engineer, Digital Design Engineering

Analog Devices

. Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit‑speed serial interfaces and video and data routing solutions.

Posted 4/1/2026full-timeBeaverton • Colorado, Oregon • 🇺🇸 United StatesLead💰 $134,644 - $201,966 per yearWebsite

About the role

Key responsibilities & impact

Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit‑speed serial interfaces and video and data routing solutions.
Architect, develop, and actively contribute to next‑generation OpenGMSL technologies, including the definition of new architectures and participation in the development of OpenGMSL technical standards for future product generations.
Write detailed block and subsystem-level specifications for design and implementation.
Use Verilog and SystemVerilog to design digital blocks, subsystems, and top‑level designs.
Develop block‑level testbenches, verify block functionality, and collaborate with verification teams to achieve full‑chip verification and coverage closure.
Perform block‑ and top‑level linting, CDC analysis, and power analysis.
Communicate closely with mixed-signal designers and verification engineers to support mixed‑signal simulations and real‑number modeling across the analog/digital boundary.
Prepare technical documentation and lead architecture, design, and peer reviews.
Support silicon bring‑up, characterization, and debug activities.
Collaborate across analog, digital, verification, test, and product definition teams to define requirements, support production test development, and ensure successful product execution.
Provide technical leadership for complex SerDes subsystems and products.

Requirements

What you’ll need

MSEE or Equivalent: Master's degree in Electrical Engineering or equivalent with 5+ years of relevant experience or PhD with 3+ years of relevant experience
Experience designing and verifying complex digital systems using Verilog/SystemVerilog
Demonstrated ability to architect and plan designs at the system level, translating high-level product concepts into robust design implementations
Understanding of communication theory, high-speed SerDes transceiver architectures, and video/data transport
Solid understanding of digital and analog design trade-offs, with experience in timing analysis, power estimation, physical design, and DFT concepts
Hands-on experience with silicon bring-up and debug

Benefits

Comp & perks

medical, vision and dental coverage
401k
paid vacation
holidays
sick time
discretionary performance-based bonus

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

VerilogSystemVerilogdigital designblock-level testbenchesCDC analysispower analysistiming analysisDFT conceptssilicon bring-updebug

Soft Skills

technical leadershipcommunicationcollaborationdocumentation preparationpeer review

Certifications

MSEEPhD in Electrical Engineering