Hardware Engineer

• Develop and test GNC hardware components and systems for the TeraWave satellite constellation
• Develop technical specifications, interface control documents, and system architecture designs for GNC subsystems
• Analyze GNC hardware performance requirements and validate designs through simulation and testing
• Collaborate with multidisciplinary teams including software engineers, avionics specialists, and mission planners to ensure integrated system performance
• Conduct system performance assessments, stability analysis, and develop risk mitigation strategies
• Provide hands-on support for integration and testing of flight hardware
• Troubleshoot and resolve hardware non-conformances and test failures
• Support supplier technical management and evaluation of GNC hardware components
• Contribute to design reviews and documentation throughout the development lifecycle
• Develop and maintain GNC hardware test procedures and verification plans

Senior Satellite GNC Hardware Engineer

• Develop, lead, and own digital, analog, and/or mixed-signal circuit avionic designs that interact with avionics systems
• Own these avionics boards across the entire product life cycle, from concept and requirements definition, design, analysis, prototyping, schematic capture, layout, design review, test/verification (power-on, functional / acceptance / qualification testing) and through release to production
• Support avionics trade studies, analyses, performance characterization and specification, and device selection
• Support controller risk analyses, failure modes effects and criticality analyses (FMECA), worst case circuit analyses (WCCA), design for test/manufacture/cost (DFx), and root-cause analysis of test discrepancies
• Participate in program level technology development, mission assurance and safety initiatives, and avionics development process improvements
• Effectively communicate development status, risks, and challenges to management

Avionics Hardware Engineer – Lunar Permanence

• Contribute to the successful development of avionics components for Lunar Vehicles
• Work with a team of engineers to define, test, and certify avionics hardware
• Engage in hardware build, integration, and test of Engineering Development Unit (EDU) and flight hardware
• Develop product requirements, define interfaces, and support hardware build
• Implement verification and qualification strategies
• Conduct root cause analysis and develop mitigation plans for hardware failures

Avionics Hardware Engineer – Level 3

• Own the end-to-end hardware design of the switching subsystem from high-speed Ethernet switch and PHY integration to power architecture, embedded management controllers, and high-speed PCB layout.
• Architect BMC subsystems using MPSoC, ARM, or RISC-V microprocessors to monitor line card health, thermal sensors, and voltage rails.
• Design and integrate low-level communication buses (I2C, SPI, PMBus, SMBus, RS-485, CAN) for hardware telemetry and sequencing control.
• Develop hardware watchdog circuits and redundant boot sequences for fault recovery.
• Enable in-flight firmware reprogrammability via ground link, including secure update and rollback mechanisms.
• Architect high-reliability power distribution with autonomous sequencing, redundant paths (e.g., ORing controllers), and fault isolation to eliminate single points of failure.
• Specify and integrate radiation-hardened or radiation-tolerant components rated for SEE and TID in the target orbital environment.
• Design power stages for thermal-vacuum operation, emphasizing high-efficiency topologies and conduction/radiation thermal transfer.
• Architect low-noise power trees using high-PSRR LDOs and multi-stage LC filtering to protect sensitive analog and high-speed digital lanes.
• Lead SPICE-based transient analysis and hardware validation of load step responses, switching transients, and voltage ripple to millivolt-level tolerances.
• Develop EMI/EMC mitigation strategies — grounding architecture, decoupling optimization, power/signal plane isolation — to prevent crosstalk between power distribution and high-speed data paths.
• Lead multi-layer PCB design for switch line cards: stackup definition, impedance-controlled routing, thermal management, and DFM.
• Manage CCA BOM procurement, vendor coordination, and assembly oversight.
• Integrate BSPs, SDKs, and device drivers for Ethernet switching and network processor components in collaboration with firmware and software teams.
• Architect and bring up high-performance Ethernet switching systems, including NPU/switch ASIC integration, PHY and SerDes tuning, VLAN configuration, and MAC-level validation across high-density line cards.
• Resolve complex hardware-software interface issues across L1 and L2, including physical layer bring-up, transceiver integration, and MAC-level debugging.
• Lead factory acceptance testing, physical layer validation (optical transceivers, high-density copper), and commissioning of switch hardware.

Principal Hardware Engineer – TeraWave Network Switch Platform

• Lead special projects assignments: e.g. NDAA, Agile PLM, W18, etc.
• Lead ERP implementation and transition and configuration management.
• Lead engineering process improvement.
• Lead product regulatory compliance & certifications: Align project scope, goals and schedule to business needs; interfacing with legal and supervising compliance engineers.
• Drive product design quality process: Drive product development quality process & alignment with stakeholder expectations for release/shipment.
• Lead new product introduction: Work with the design team, Supply Chain, and Quality to define and transition new designs into productions.
• Lead product lifecycle management: Drive revenue sustainability process (e.g. Excess & Obsolescence, Part Shortage mitigation, Dual sourcing).
• Build and lead a team of other operational support roles that may include technicians, component engineers, administrative staff, etc.
• Travel Requirement – travel to Silvus headquarters as well as other offices as needed.
• Perform other relevant duties of which the above are representative.

Director of Hardware Engineering Operations

• Generate FPGA requirements in coordination with systems engineering, hardware engineering, software engineering and subsystem owners.
• Design, write HDL code, verify and document complex low-level modules
• Participate reviews of FPGA Design and Verification Artifacts
• 10% travel to other Blue Origin locations for various meetings, or large-scale company events.

FPGA Engineer – Level 3

• Generate FPGA requirements in coordination with systems engineering, hardware engineering, software engineering and subsystem owners
• Design, write HDL code, verify and document complex low-level modules
• Participate reviews of FPGA Design and Verification Artifacts
• 10% travel to other Blue Origin locations for various meetings, or large-scale company events

FPGA Engineer – Level 2

• Lead development of DFT solutions for next-generation ASICs for multi-100G to 1.6T coherent optical communications products
• Lead implementation of SSN, hierarchical test flow DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, using Siemens Tessent, or Synopsys, tools for RTL and gate netlist DFT implementation
• Generate and deliver ATPG test pattern for stuck-at, transition, cell aware and path delay fault models
• Drive scan-based diagnosis methodology for Silicon failure debug
• Provide post-silicon testing and validation support
• Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
• Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
• Perform simulation runs and debug for non-timing and back annotated timing (SDF) gate level simulations
• Develop test scripts, automate processes, and analyze data using programming languages such as Python, Tcl, or C++

ASIC Engineering Technical Lead – DFT

• Own ECLS hardware components through the entire life cycle: Conception, Design, Build, Test, Install, and Operations
• Personally design and analyze ECLS and crew systems hardware from concept through flight
• Directly perform detailed engineering calculations including heat transfer, fluid dynamics, and mechanical stress analyses
• Create and refine CAD models for flight hardware components and assemblies
• Develop technical solutions for atmospheric control, water management, waste collection, and crew interfaces
• Solve technical and program problems with the help of your team
• Be actively involved in development testing of your hardware
• Determine and manage the schedule and budget for owned hardware
• Show system and component compliance to Blue and NASA technical requirements
• Be the technical point of contact for your hardware
• Support hardware integration and resolve technical issues in real-time
• Design mechanical systems with consideration for crew operation and maintenance
• Coordinate with manufacturing teams to ensure design intent is maintained
• Adhere to Blue Leadership Principles.

• Will own an avionics box(s) for the C&DH team.
• Developing product requirements and defining interfaces for engineering projects.
• Supporting hardware build, integration, and testing processes.
• Developing and implementing verification and qualification strategies.
• Conducting root cause analysis for hardware failures and developing mitigation plans.

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