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Snap Inc.

Integrated Circuit Design Verification Engineer

Snap Inc.

Integrated Circuit Design Verification Engineer developing display Integrated Circuits for augmented reality at Snap. Collaborating with multi-disciplinary teams to ensure design verification through advanced methodologies.

Posted 7/7/2026full-timeWashington • 🇺🇸 United StatesSeniorLead💰 $173,000 - $259,000 per yearWebsite

Tech Stack

Tools & technologies
LinuxPerlPython

About the role

Key responsibilities & impact
  • Work as part of a multi-disciplinary team designing display Integrated Circuits for AR
  • Work closely with digital design, analog logic, software and verification engineers
  • Develop and implement UVM-based and assertion-based testbenches
  • Create and execute verification test plans, including functional coverage and code coverage
  • Utilize Siemens Questa tool set for verification and debug tasks
  • Specify and configure tools and create automation

Requirements

What you’ll need
  • BSEE or MSEE or relevant years of experience
  • 10+ years of experience in ASIC Design Verification
  • Strong knowledge of UVM and SystemVerilog for advanced verification methodologies
  • Strong knowledge of digital functional simulation, and tools such as Siemens Questa
  • Strong knowledge of good Verilog RTL coding practices
  • Scripting and automation, such as TCL, Make, Perl, Python and Shell scripts in Linux environment
  • Ideal candidate is a self-starter, can organise complex issues and drive them to closure
  • Able to multitask and prioritise.

Benefits

Comp & perks
  • paid parental leave
  • comprehensive medical coverage
  • emotional and mental health support programs
  • compensation packages that let you share in Snap’s long-term success!

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools
ASIC Design VerificationUVMSystemVerilogDigital Functional SimulationVerilog RTL CodingTCLMakePerlPythonShell Scripting
Soft Skills
Self-StarterOrganizational SkillsMultitaskingPrioritization
Certifications
BSEEMSEE