Principal SoC Chip Lead

NXP Semiconductors

Principal SoC Chip Lead owning NXP semiconductor SoC programs from architecture through tape-out and silicon validation in China. Coordinating global engineering teams, technical execution, and project risk management.

Posted 8/4/2026full-timeShanghai • 🇨🇳 ChinaSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in SoC program execution, including architecture, RTL design, verification, and post-silicon validation. Proven ability to lead cross-functional engineering teams and manage project risks while ensuring timely delivery of milestones.

Highest-signal resume keywords

SoC DevelopmentProject ExecutionCross-Functional Team LeadershipRisk ManagementSilicon Validation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

ArchitectureRTL DesignIntegrationVerificationDFTEmulationPhysical DesignSilicon ValidationProject PlanningTechnical Decision-Making

Soft Skills

CommunicationLeadershipStakeholder ManagementInfluencingProblem-Solving

Certifications & Qualifications

Bachelor's Degree in MicroelectronicsBachelor's Degree in Electrical Engineering

Industry Keywords

Semiconductor IndustrySoC Development FlowsAutomotive ProductsIndustrial ProductsSafety-Critical Products

About the role

Key responsibilities & impact

Own SoC program execution from project definition through tape-out and post-silicon support
Ensure on-time, high-quality delivery of key milestones
Coordinate engineering support during silicon bring-up, validation, and debug
Drive technical decision-making across architecture, integration, verification, implementation, validation, and system teams
Serve as the overall technical execution owner for assigned projects
Lead and align Architecture, RTL, DFT, Verification, Emulation, Physical Design, AMS, IP, and related engineering teams
Resolve technical dependencies, execution bottlenecks, and critical project risks
Develop and maintain project execution plans with PMO and SoC PM
Monitor schedule, resource demand, critical paths, and risk mitigation plans
Drive recovery actions when milestones are at risk
Partner with Product Marketing, System Architecture, System Engineering, NPI PM, BU management, and external stakeholders
Communicate project status, technical readiness, key risks, and mitigation plans during management and milestone reviews
Own overall tape-out readiness, including integration quality, signoff closure, cross-functional alignment, and risk management
Coordinate post-silicon validation activities and engineering resources for silicon bring-up and issue resolution

Requirements

What you’ll need

Bachelor's degree or higher in Microelectronics, Electrical Engineering, or related disciplines
6+ years of semiconductor industry experience
Proven experience in SoC development from architecture through tape-out
Strong understanding of SoC development flows, including Architecture, RTL Design, Integration, Verification, DFT, Emulation, Physical Design, and Silicon Validation
Experience leading large cross-functional engineering teams
Strong project execution, planning, and risk management skills
Excellent communication, leadership, and stakeholder management capabilities
Ability to influence technical direction and drive execution in a matrix organization
Previous experience as Chip Lead, SoC Technical Lead, Chief Engineer, or Project Technical Leader preferred
Experience with automotive, industrial, or safety-critical semiconductor products preferred
Experience working with global development teams across multiple sites preferred
Successful delivery of multiple SoC tape-outs and post-silicon product ramps preferred

Benefits

Comp & perks

Online and offline learning opportunities for core and professional skills
Career development opportunities
Inclusive work environment
Diversity, inclusion, and equality programs