Analog Data Converter Design

NXP Semiconductors

. Architect and define next-generation data converter solutions, including: High-resolution and high-speed ADCs (SAR, Sigma-Delta(Discrete Time and Continuous time), Time-Interleaved) .

Posted 5/24/2026full-timeCatania • 🇮🇹 ItalySeniorLeadWebsite

Tech Stack

Tools & technologies

DAC

About the role

Key responsibilities & impact

Architect and define next-generation data converter solutions, including: High-resolution and high-speed ADCs (SAR, Sigma-Delta(Discrete Time and Continuous time), Time-Interleaved)
High-performance DACs (current steering, charge redistribution, segmented architectures)
Translate system-level requirements (SNR, SFDR, ENOB, bandwidth, power) into detailed architecture and sub-block specifications
Drive end-to-end design of data converters, including: Front-end signal conditioning, references, and clocking
High-speed sampling circuits and precision analog core
Calibration, linearity enhancement, and mismatch correction techniques
Develop system-level and behavioral models (MATLAB/Simulink, Verilog-A/AMS) to validate architecture, noise shaping, and dynamic performance
Lead detailed circuit design and analysis for critical blocks such as: High-speed comparators, opamps, DAC elements, reference buffers, and clocking circuits
DAC mismatch and ADC linearity
Perform deep analysis of performance metrics (SNR, SNDR, SFDR, INL/DNL, jitter sensitivity) and correlate with silicon results
Drive silicon validation, debug, and performance optimization across PVT corners
Serve as technical lead and interface with system teams, customers, and cross-functional stakeholders
Mentor junior designers and build technical depth in converter design methodologies across the organization
Drive innovation and develop differentiated architectures, including patentable solutions.

Requirements

What you’ll need

MS in Electrical Engineering with 12+ years, or PhD with 10+ years of experience in ADC/DAC design
Strong expertise across multiple data converter architectures: SAR, Sigma-Delta (DT and CT), Time-Interleaved ADCs
Current steering and segmented DACs
Proven track record in designing high-performance converters
Deep understanding of: Noise shaping, quantization noise, and distortion mechanisms
Clocking and jitter impact on converter performance
Calibration techniques (background/foreground, DEM, mismatch correction)
Strong experience with high-speed analog design challenges: Bandwidth, settling, distortion, and parasitic effects
Expertise in system-level modeling and behavioral simulation (MATLAB/Simulink, Verilog-A/AMS)
Hands-on experience with Cadence tools (Virtuoso, Spectre) and mixed-signal simulation flows
Proven ability to take converter designs from concept through silicon validation and production
Demonstrated innovation capability with patents/publications in data converter design
Strong communication skills with ability to influence cross-functional teams and customers.

Benefits

Comp & perks

Health insurance
401(k) matching
Flexible work hours
Professional development opportunities

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

ADC designDAC designdata converter architectureshigh-speed analog designsystem-level modelingbehavioral simulationcalibration techniquesperformance metrics analysisnoise shapingdistortion mechanisms

Soft Skills

communication skillsmentoringtechnical leadershipcross-functional collaborationinnovation capability

Certifications

MS in Electrical EngineeringPhD in Electrical Engineering