NVIDIA

Full-stack Engineer

• Build, develop, and optimize Tegra-based Automotive Platforms and real-time computing environments, specifically QNX Systems responsible for Memory Management.
• Build and optimize page management, memory allocation, and memory virtualization solutions suited for high-performance and embedded environments.
• Collaborate with Hardware & Software teams and Product Owners to define and refine SoC memory management requirements.
• Work with collaborator engineering teams to understand needs, define requirements, and deliver efficient solutions.
• Debug and triage complex memory-related issues in both kernel and user space on production systems.
• Improve memory handling in low-power, real-time, and resource-constrained environments.
• Set performance goals, monitor feedback, analyze data, and make continuous improvements for system performance and resource utilization for QNX and Linux-based systems.

Senior System Software Engineer – Tegra, Memory SW

Technical Program Manager

• Own Metropolis manufacturing programs end-to-end, including milestone tracking and PLC (Product Life Cycle) completion for manufacturing and industrial AI workflow and blueprint
• Drive cross-functional coordination between AI/ML engineering teams, product management, customers and ISV partners
• Build and maintain release schedules, lead status meetings, and continuously improve manufacturing workflows
• Track progress, prioritize issues, and drive them to closure in a timely manner
• Lead partner relationships and technology adoption with Taiwan manufacturing customers
• Define and monitor KPIs across partner deployments and engineering operations

Senior Technical Program Manager

Engineer

• You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block level, chiplet level, and/or full chip level.
• Analyze and optimize design constraints and synthesis parameters to achieve performance, power, and area targets.
• Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation.

Senior ASIC Timing Engineer

Infrastructure Engineer

• Work towards building applications and developing infrastructure for a highly scalable deep learning platform.
• Design, build, and maintain high bandwidth data-pipelines and related infrastructure, such as APIs, databases and services.
• Work closely with domain experts, research teams and take ownership of productizing, releasing and maintaining deep learning products.
• Be an engineering generalist. Discover and build skills needed at different times towards solving problems at hand.

Senior Deep Learning Infrastructure Engineer

Designer

• Developing Efficient physical design methodologies for implementation of graphics processors and SOCs.
• Key responsibility includes developing unique and creative solutions to the state-of-the-art physical design problems to improve PPA
• Knowledge and experience to formulate and develop with ML-based solutions
• Participate in developing flow and tool methodologies for P&R, timing analysis and closure, convergence in IR/Signal-EM, power and noise analysis and back-end verification across multiple projects along with chip floorplan, power and clock distribution, chip assembly.
• Data based analysis and algorithmic solutions for PPA check and improvement.

Senior Physical Design Methodology Engineer, PPA Fusion Compiler

Software Engineer

• Driving Innovation: researching, analyzing, and developing innovative techniques to optimize performance of complex workloads across cloud and on-premise environments.
• Technical Leadership: leading software design decisions, influencing architecture roadmap, and effectively communicating technical solutions to multi-functional teams.
• Growing and Mentoring Your Team: building a distributed world-class team of performance engineers and fostering a collaborative and innovative culture.
• Collaboration and Communication: collaborating closely with company leadership, research teams, and cross-functional partners to drive strategic decision-making.

Manager, Developer Technology

• Work with design team to understand Hardware specification for Software development and design and implement these requirements.
• Develop software in modern C++ and various scripting languages to enable design and development of software enabling efficient test pattern generation, application of these patterns on Silicon, failure analysis, and yield learning.
• Investigate optimization approaches so our software can run on GPUs.
• Utilize AI tooling for software workflows, code generation and optimization.
• Integrating advanced tools for CI/CD, code quality, and automated testing.

Senior CAD Engineer – DFX Software

Analyst

• Lead projects for implementing new solutions in Supply Chain Management
• Collaborate with business leaders to understand requirements
• Architect SAP system solutions
• Design analytic and reporting solutions
• Conduct testing and training
• Mentor implementation team

SAP Business System Analyst – Production Planning

Developer Relations

• Be the technical authority for our capital markets ecosystem, ensuring flawless execution and impactful results.
• Collaborate with cross-functional teams, including solution architects, engineering, product management, and marketing, to successfully implement initiatives that drive engagement and growth of the ecosystem.
• Build and nurture relationships with quants, developers, partners, and industry leaders to foster a vibrant AI-driven capital markets community.
• Provide technical mentorship and support to quant researchers, developers, and financial engineers, helping them innovate and win using NVIDIA's technologies.
• Act as the voice of the developer, gathering insights and feedback to directly influence the product roadmap for NVIDIA's AI platforms and tools, ensuring they meet the evolving needs of the Capital Markets developer community.
• Coordinate and participate in events, webinars, and other activities to showcase our solutions and engage with the capital markets community.

Developer Relations Manager – Capital Markets

• Responsible for defining, coding and integrating sophisticated DFT components into various projects
• Participate in defining various DFT features and improvements
• Write micro-architecture documents
• Code design blocks
• Integrate them into various projects
• Collaborate with architects, other design teams, verification, back-end and production testing

Senior DFT Engineer

Mechanical Engineer

• Develop and innovate system designs for SRAMs, achieving SOL performance, power, VMIN, yield, and VF specifications
• Analyze next-generation design for reliability and speed behavior, build modeling techniques, and make product optimizations
• Drive initiatives across multiple teams to derive best-in-class speed and reliability
• Build pre- and post-silicon methodologies to characterize silicon features, correlate silicon behavior with simulations, and provide design feedback
• Find creative solutions to complex silicon and system-level problems and be on the frontline to lead show-stopper bugs, in order to enable product shipment

Senior SRAM Co-Design Engineer

Engineering Manager

• Managing the development and optimization of software architecture and frameworks for real-world performance while matching or exceeding customer requirements
• Working on areas such as component abstraction layers, inter-process data sharing and communication, and process scheduling
• Developing efficient mechanisms to maximize utilization on computers with multiple heterogeneous hardware engines
• Solidifying existing frameworks and software components and validate with large amounts of real and synthetic the improvements of the computational performance and system utilization
• Performing in-vehicle tests, collecting data and completing autonomous drive missions
• Developing unit tests, documentation for features, evaluating quality and proposing corrective actions
• Developing highly efficient product code in C++, making use of high algorithmic parallelism offered by GPGPU programming (CUDA)
• Follow quality and safety standards such as defined by MISRA.

Manager, Software Engineering – AV Frameworks

Artificial Intelligence

• Set strategy and lead execution for agentic AI systems for the CUDA ecosystem, defining roadmaps and measurable success metrics (performance, quality, reliability, developer productivity).
• Co-design agentic system solutions with software, hardware and algorithm teams; influence and adopt new capabilities as they become available.
• Develop reproducible, high-fidelity evaluation frameworks covering performance, quality and developer productivity.
• Collaborate across the AI stack and help drive architecture and key technical decisions —from hardware through compilers/toolchains, kernels/libraries, frameworks, distributed training, and inference/serving—and with model and research/engineering teams.
• Scale impact through leadership: mentor and grow senior technical talent.

Distinguished Engineer – High Performance AI

Systems Engineer

• Interact with product, engineering & business teams to gather & analyze requirements for the SW & Services Monetization Program.
• Design, develop, and enhance robust, scalable solutions across the SAP Order-to-Cash (OTC) landscape and associated satellite systems.
• Operate as an expert to review business requirements, process designs, solution designs, and implementation.
• Build and maintain critical integrations between SAP and other satellite systems supporting the Order-to-Cash process
• Generate, assess, and uphold high-level project plans, detailed functional and technical design documents for various functional areas.
• Develop Roadmaps for the SW & Services Monetization Program and align within IT and with the business.
• Develop and maintain use cases, process diagrams and user functional flows.
• Develop and execute test plans for unit and integration testing to ensure high-quality outcomes.
• Coordinate User Acceptance Testing (UAT) and manage weekly/monthly deployment release cycles.
• Serve as the primary point of contact between IT and OTC business users.
• Collaborate with Business, Product Management, and Engineering to deliver innovative solutions.
• Work with internal and external development teams to create scalable and sustainable custom applications and enhancements to packaged applications.
• Partner with IT Vendor Management Office in RFP development, vendor evaluation, contract renewals and negotiations.