Software R&D Engineer, RTL Optimization Tools

NVIDIA

CAD Software Engineer developing innovative strategies for RTL optimization at NVIDIA. Focused on algorithms, parallel computing, and collaboration with design teams.

Posted 6/12/2026full-timeSanta Clara • California, Texas • 🇺🇸 United StatesMid-LevelSenior💰 $136,000 - $218,500 per yearWebsite

About the role

Key responsibilities & impact

Invent new methods to enable parallel, graph-based RTL traversal, analysis, and manipulation.
Devise strategies for rapidly analyzing the impact of RTL changes on data path latency, power, and impact to DFT, clocking, and power delivery.
Explore use of LLMs (Large Language Models), GNNs (Graph Neural Networks), GANs (Generative Adversarial Networks), and Reinforcement Learning for suggesting or automatically implementing RTL modifications.
Explore high performance algorithms for clustering, min cost tree covering (technology mapping), datapath implementation and other details of logic synthesis, especially that efficiently incorporate human insight.
Drive the roadmap of increasing hardware design productivity across the design teams.

Requirements

What you’ll need

MS or PhD in Electrical Engineering or Computer Science or equivalent experience
3+ years of relevant experience in CAD software and VLSI hardware design
Demonstrated ability in software development with C++, particularly in algorithm development related to graph traversal, pattern matching, and optimization
Familiarity with RTL design, including Verilog and SystemVerilog code, as well as general hardware design concerns such as scan chain insertion, MBIST, clock and power distribution, and bus architectures
Familiarity with related EDA techniques, including logic synthesis, global route, static timing analysis, and SAT solvers
Strong communication and interpersonal skills
Experience with common EDA building blocks, such as Verific for Verilog parsing, Espresso for logic minimization, and various other components for logic rewriting, tree coverage, SAT solvers, and combinatorial optimization
Experience in high performance software design including multithreading, distributed computing, efficient memory and I/O use, etc.
Previous work experience including both software and hardware roles, especially involving SOC/IP integration or RTL design
Experience with various machine learning techniques for analysis, optimization, and code generation.

Benefits

Comp & perks

equity
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Hard Skills & Tools

C++algorithm developmentgraph traversalpattern matchingoptimizationRTL designVerilogSystemVerilogEDA techniquesmachine learning

Soft Skills

communication skillsinterpersonal skills

Certifications

MS in Electrical EngineeringPhD in Computer Science