Senior Mixed-Signal Design Verification Engineer
NVIDIA
full-time
Posted on:
Location Type: Hybrid
Location: Hsinchu • 🇹🇼 Taiwan
Visit company websiteJob Level
Senior
Tech Stack
Perl
About the role
- Verify the design and implementation of the world’s leading SoC's and GPU's
- Responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies
- Understand complex mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design
- Work closely with Multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks.
Requirements
- Bachelors Degree in EE, CS or CE or equivalent experience
- 5+ years of relevant experience or an Advanced Degree with equivalent experience
- Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design
- Background with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
- Experience in crafting test bench environments for component and top level circuit verification
- Expertise in System Verilog or similar HVL
- Perl and C/C++ programming language experience desirable
- Strong debugging and analytical skills
- Strong communication skills and ability & desire to work as a great teammate are huge plus.
Benefits
- NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
Mixed Signal CMOS circuit designverification methodologiesdeep sub-micron process designanalog circuit simulationSystem VerilogHSpiceFinesimtest bench environmentsC/C++ programmingdebugging
Soft skills
analytical skillscommunication skillsteamwork
Certifications
Bachelors Degree in EEBachelors Degree in CSBachelors Degree in CE