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NVIDIA

ASIC Design Efficiency Engineer

NVIDIA

ASIC Design Efficiency Engineer designing hardware accelerators and processors at NVIDIA. Collaborating with teams to drive performance and efficiency in GPU designs across various platforms.

Posted 5/21/2026full-timeSanta Clara • California, North Carolina, Texas • 🇺🇸 United StatesJuniorMid-Level💰 $116,000 - $189,750 per yearWebsite

Tech Stack

Tools & technologies
PerlPython

About the role

Key responsibilities & impact
  • Develop innovative HW, GPU and system designs to extend the state of the art performance and efficiency
  • Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA) improvements
  • Execute and deliver fully verified, high performance, area and power efficient RTL to achieve design targets
  • Collaborate with architects, designers, verification and VLSI teams to craft the industries' top performing GPUs

Requirements

What you’ll need
  • Bachelors Degree in EE or CE or equivalent experience
  • 2+ years of experience
  • Proficiency in SystemVerilog or similar HDL
  • solid understanding of logic design and computer architecture
  • Strong interpersonal skills
  • Pipeline processor or deep learning accelerator design/architecture experience
  • Performance verification, low power or physical (synthesis/VLSI) design experience
  • Scripting knowledge in Python/Perl

Benefits

Comp & perks
  • equity
  • benefits 📊 Check your resume score for this job Improve your chances of getting an interview by checking your resume score before you apply. Check Resume Score

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Hard Skills & Tools
SystemVerilogHDLlogic designcomputer architectureperformance verificationlow power designphysical designsynthesisVLSIscripting in Python
Soft Skills
interpersonal skills
Certifications
Bachelors Degree in EEBachelors Degree in CE