
Senior Verification Engineer – HSIO Unit Level
NVIDIA
full-time
Posted on:
Location Type: Hybrid
Location: Bengaluru • India
Visit company websiteExplore more
Job Level
About the role
- Develop UVM-based verification test benches and methodologies.
- Verify complex rapid data transfer IO IPs and sub-systems such as USB, UFS, MPHY, Ethernet, and MACSEC.
- Architect the testbenches and craft verification environment using SV and UVM methodology.
- Define test plans, tests and verification infrastructure for modules, clusters and systems.
- Build efficient and reusable bus functional models, monitors, checkers, and scoreboards.
- Implement functional coverage and coordinate the verification closure process for the unit.
- Work with architects, designers, FPGA, and post-silicon teams to ensure that your unit is robust.
Requirements
- BTech or MTech in ECE, EE, CSE, or an equivalent degree is required.
- 4+ years of demonstrated ability in verification closure of complex units, sub-systems, or SOC level verification.
- Proven experience in High Speed IO verification (UFS/PCIE/XUSB).
- Knowledge of 10G/1G Ethernet MAC and Switch.
- Experience in the latest verification methodologies like SV and UVM.
- Good debugging and analytical skills with exposure to industry-standard verification tools for simulation and debug.
- Good interpersonal skills, ability to work as a diligent teammate, and excellent communication skills to collaborate with cross-cultural global teams.
Benefits
- Comprehensive benefits package
- Competitive salaries
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
UVMSVverification test benchesfunctional coveragebus functional modelsmonitorscheckersscoreboardsverification infrastructureverification closure
Soft Skills
debugginganalytical skillsinterpersonal skillsteamworkcommunication skills